OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [mul.c] - Diff between revs 381 and 604

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 381 Rev 604
Line 10... Line 10...
#include <stdlib.h>
#include <stdlib.h>
#define LONGEST long long
#define LONGEST long long
 
 
LONGEST acc = 0;
LONGEST acc = 0;
#define MAC(x,y) {\
#define MAC(x,y) {\
  /*printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));*/\
  printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));\
  acc += (LONGEST)(x) * (LONGEST)(y);\
  acc += (LONGEST)(x) * (LONGEST)(y);\
  /*printf ("(%08x,%08x)\n", (unsigned long)(acc >> 32), (unsigned long)(acc & 0xffffffff));*/\
  printf ("(%08x,%08x)\n", (unsigned long)(acc >> 32), (unsigned long)(acc & 0xffffffff));\
}
}
#define MACRC    (macrc())
#define MACRC    (macrc())
static inline long macrc() {
static inline long macrc() {
  long result = acc >> 28;
  long result = acc >> 28;
  //printf ("<%08x>\n", (unsigned long)result);
  //printf ("<%08x>\n", (unsigned long)result);
Line 89... Line 89...
  }
  }
  return a;
  return a;
}
}
 
 
int main () {
int main () {
  unsigned t1 = test_mul (888888887, 0x87654321);
  unsigned t1;
  unsigned t2 = test_mac (888888887, 0x87654321);
  unsigned t2;
  unsigned t3 = test_mul_mac (888888887, 0x87654321);
  unsigned t3;
 
  printf ("%08x\n", MACRC);
 
  t1 = test_mul (888888887, 0x87654321);
 
  t2 = test_mac (888888887, 0x87654321);
 
  t3 = test_mul_mac (888888887, 0x87654321);
  printf ("%08x, expected %08x\n", t1, T1);
  printf ("%08x, expected %08x\n", t1, T1);
  printf ("%08x, expected %08x\n", t2, T2);
  printf ("%08x, expected %08x\n", t2, T2);
  printf ("%08x, expected %08x\n", t3, T3);
  printf ("%08x, expected %08x\n", t3, T3);
  report (t1 ^ t2 ^ t3 ^ T1 ^ T2 ^ T3 ^ 0xdeaddead);
  report (t1 ^ t2 ^ t3 ^ T1 ^ T2 ^ T3 ^ 0xdeaddead);
  if (t1 != T1 || t2 != T2 || t3 != T3) {
  if (t1 != T1 || t2 != T2 || t3 != T3) {

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.