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Line 33... |
if the current burst cross the page boundar.
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if the current burst cross the page boundar.
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This module takes requests from the memory controller,
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This module takes requests from the memory controller,
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chops them to page boundaries if wrap=0,
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chops them to page boundaries if wrap=0,
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and passes the request to bank_ctl
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and passes the request to bank_ctl
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Note: With Wrap = 0, each request from Application layer will be splited into two request,
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if the current burst cross the page boundary.
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To Do:
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To Do:
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nothing
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nothing
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Author(s):
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Author(s):
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- Dinesh Annayya, dinesha@opencores.org
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- Dinesh Annayya, dinesha@opencores.org
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parameter APP_RW = 9; // Application Request Width
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parameter APP_RW = 9; // Application Request Width
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parameter SDR_DW = 16; // SDR Data Width
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parameter SDR_DW = 16; // SDR Data Width
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parameter SDR_BW = 2; // SDR Byte Width
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parameter SDR_BW = 2; // SDR Byte Width
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parameter REQ_BW = 12; // Request Width
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input clk ;
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input clk ;
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input reset_n ;
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input reset_n ;
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input [1:0] cfg_colbits ; // 2'b00 - 8 Bit column address, 2'b01 - 9 Bit, 10 - 10 bit, 11 - 11Bits
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input [1:0] cfg_colbits ; // 2'b00 - 8 Bit column address, 2'b01 - 9 Bit, 10 - 10 bit, 11 - 11Bits
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/* Request from app */
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/* Request from app */
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input req_wrap ; // 1 - Wrap the Address on page boundary
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input req_wrap ; // 1 - Wrap the Address on page boundary
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output req_ack ; // Request Ack
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output req_ack ; // Request Ack
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/* Req to bank_ctl */
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/* Req to bank_ctl */
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output r2x_idle ;
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output r2x_idle ;
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output r2b_req ;
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output r2b_req ; // Request
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output r2b_start ;
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output r2b_start ; // First Junk of the Burst Access
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output r2b_last ;
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output r2b_last ; // Last Junk of the Burst Access
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output r2b_write ;
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output r2b_write ; // 1 - Write, 0 - Read
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output r2b_wrap ;
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output r2b_wrap ; // 1 - Wrap the Address at the page boundary.
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output [`SDR_REQ_ID_W-1:0] r2b_req_id;
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output [`SDR_REQ_ID_W-1:0] r2b_req_id;
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output [1:0] r2b_ba ;
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output [1:0] r2b_ba ; // Bank Address
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output [11:0] r2b_raddr ;
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output [11:0] r2b_raddr ; // Row Address
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output [11:0] r2b_caddr ;
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output [11:0] r2b_caddr ; // Column Address
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output [APP_RW-1:0] r2b_len ;
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output [REQ_BW-1:0] r2b_len ; // Burst Length
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input b2r_ack ;
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input b2r_ack ; // Request Ack
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input b2r_arb_ok ;
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input b2r_arb_ok ; // Bank controller fifo is not full and ready to accept the command
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//
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//
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input [1:0] sdr_width; // 2'b00 - 32 Bit, 2'b01 - 16 Bit, 2'b1x - 8Bit
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input [1:0] sdr_width; // 2'b00 - 32 Bit, 2'b01 - 16 Bit, 2'b1x - 8Bit
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/****************************************************************************/
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/****************************************************************************/
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reg req_st, next_req_st;
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reg req_st, next_req_st;
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reg r2x_idle, req_ack, r2b_req, r2b_start,
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reg r2x_idle, req_ack, r2b_req, r2b_start,
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r2b_write, req_idle, req_ld, lcl_wrap;
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r2b_write, req_idle, req_ld, lcl_wrap;
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reg [`SDR_REQ_ID_W-1:0] r2b_req_id;
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reg [`SDR_REQ_ID_W-1:0] r2b_req_id;
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reg [APP_RW-1:0] lcl_req_len;
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reg [REQ_BW-1:0] lcl_req_len;
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wire r2b_last, page_ovflw;
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wire r2b_last, page_ovflw;
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wire [APP_RW-1:0] r2b_len, next_req_len;
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wire [REQ_BW-1:0] r2b_len, next_req_len;
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wire [APP_RW:0] max_r2b_len;
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wire [REQ_BW:0] max_r2b_len;
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reg [1:0] r2b_ba;
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reg [1:0] r2b_ba;
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reg [11:0] r2b_raddr;
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reg [11:0] r2b_raddr;
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reg [11:0] r2b_caddr;
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reg [11:0] r2b_caddr;
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//
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//
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// if the wrap = 1, then this block will not modify the request address and length.
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// if the wrap = 1, then this block will not modify the request address and length.
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// The wrapping functionality will be handle by the bank control module and
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// The wrapping functionality will be handle by the bank control module and
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// column address will rewind back as follows XX -> FF ? 00 ? 1
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// column address will rewind back as follows XX -> FF ? 00 ? 1
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//
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//
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// Note: With Wrap = 0, each request from Application layer will be spilited into two request,
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// if the current burst cross the page boundary.
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assign page_ovflw = ({1'b0, lcl_req_len} > max_r2b_len) ? ~lcl_wrap : 1'b0;
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assign page_ovflw = ({1'b0, lcl_req_len} > max_r2b_len) ? ~lcl_wrap : 1'b0;
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assign r2b_len = (page_ovflw) ? max_r2b_len : lcl_req_len;
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assign r2b_len = (page_ovflw) ? max_r2b_len : lcl_req_len;
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assign next_req_len = lcl_req_len - r2b_len;
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assign next_req_len = lcl_req_len - r2b_len;
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