URL
https://opencores.org/ocsvn/sockit_owm/sockit_owm/trunk
[/] [sockit_owm/] [trunk/] [sim/] [gtkwave.sav] - Diff between revs 2 and 3
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Rev 2 |
Rev 3 |
?rev1line? |
?rev2line? |
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[timestart] 0
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[size] 1366 691
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[pos] -1 -1
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*-29.539524 1000162666 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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[treeopen] onewire_tb.
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@28
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onewire_tb.clk
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onewire_tb.rst
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@800200
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-Avalon MM bus
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@28
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onewire_tb.avalon_write
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onewire_tb.avalon_read
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onewire_tb.avalon_interrupt
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@1000200
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-Avalon MM bus
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@800200
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-1-wire master
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@200
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-clock divider
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@28
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onewire_tb.onewire_master.pls
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@200
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-control/satus
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@28
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onewire_tb.onewire_master.owr_cyc
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onewire_tb.onewire_master.owr_ovd
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onewire_tb.onewire_master.owr_rst
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onewire_tb.onewire_master.owr_dat
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@200
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-state machine
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@c00201
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-timing
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@200
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-reset timing
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@22
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onewire_tb.onewire_master.t_rst[7:0]
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onewire_tb.onewire_master.t_rsth[7:0]
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onewire_tb.onewire_master.t_rstp[7:0]
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@200
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-read/write timing
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@22
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onewire_tb.onewire_master.t_bit[7:0]
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onewire_tb.onewire_master.t_dat1[7:0]
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onewire_tb.onewire_master.t_bits[7:0]
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onewire_tb.onewire_master.t_dat0[7:0]
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@1401201
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-timing
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@200
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-select & power
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@28
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onewire_tb.onewire_master.owr_sel[1:0]
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@1000200
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-1-wire master
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@28
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onewire_tb.owr_p
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onewire_tb.owr_e
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onewire_tb.owr_i
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[pattern_trace] 1
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[pattern_trace] 0
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