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//// ////
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//// ////
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////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////
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`include "timescale.v"
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`include "timescale.v"
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module vga_controller ( reset, clk_50, line, vert_counter, SW, VGA_R, VGA_G, VGA_B, LEDR, VGA_VS, VGA_HS);
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module vga_controller ( reset_n, clk_50, line, vert_counter, SW, VGA_R, VGA_G, VGA_B, LEDR, VGA_VS, VGA_HS);
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input reset;
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input reset_n;
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input clk_50;
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input clk_50;
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input [8:0] SW;
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input [8:0] SW;
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input [479:0] line;
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input [479:0] line;
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input [4:0] vert_counter;
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input [4:0] vert_counter;
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output reg [3:0] VGA_R;
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output reg [3:0] VGA_R;
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Line 63... |
reg [9:0] vc;
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reg [9:0] vc;
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reg vsenable;
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reg vsenable;
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wire vidon;
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wire vidon;
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assign LEDR[8:0] = SW;
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assign LEDR[8:0] = SW;
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assign LEDR[9] = reset;
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assign LEDR[9] = reset_n;
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always @ (posedge clk_50 or negedge reset)
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always @ (posedge clk_50 or negedge reset_n)
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begin
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begin
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if (!reset) begin
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if (!reset_n) begin
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clk_25 <= 0;
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clk_25 <= 0;
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end
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end
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else begin
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else begin
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clk_25 <= !clk_25;
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clk_25 <= !clk_25;
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end
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end
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end
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end
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always @ (posedge clk_25 or negedge reset)
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always @ (posedge clk_25 or negedge reset_n)
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begin
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begin
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if (!reset) begin
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if (!reset_n) begin
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hc <= 0;
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hc <= 0;
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VGA_HS <= 1;
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VGA_HS <= 1;
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vsenable <= 0;
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vsenable <= 0;
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end
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end
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else if (hc < 640) begin
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else if (hc < 640) begin
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hc <= 0;
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hc <= 0;
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vsenable <= 1;
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vsenable <= 1;
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end
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end
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end
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end
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always @ (posedge clk_25 or negedge reset)
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always @ (posedge clk_25 or negedge reset_n)
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begin
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begin
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if (!reset) begin
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if (!reset_n) begin
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vc <= 0;
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vc <= 0;
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VGA_VS <= 1;
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VGA_VS <= 1;
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end
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end
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else begin
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else begin
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if (vsenable == 1) begin
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if (vsenable == 1) begin
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Line 140... |
end
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end
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end
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end
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always @ (posedge clk_25)
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always @ (posedge clk_25)
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begin
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begin
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VGA_R[0] <= 0;
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VGA_G[0] <= 0;
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VGA_B[0] <= 0;
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VGA_R[1] <= 0;
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VGA_G[1] <= 0;
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VGA_B[1] <= 0;
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VGA_R[2] <= 0;
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VGA_G[2] <= 0;
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VGA_B[2] <= 0;
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VGA_R[3] <= 0;
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VGA_G[3] <= 0;
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VGA_B[3] <= 0;
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if (vidon == 1) begin
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if (vidon == 1) begin
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if (hc < 40) begin
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if (hc < 40) begin
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if (vert_counter < 10) begin
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if (vc < 30) begin
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if (vert_counter == 1) begin
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/*VGA_R[0] <= line[hc*12];
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/*VGA_R[0] <= line[hc*12];
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VGA_R[1] <= line[hc*12+1];
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VGA_R[1] <= line[hc*12+1];
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VGA_R[2] <= line[hc*12+2];
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VGA_R[2] <= line[hc*12+2];
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VGA_R[3] <= line[hc*12+3];
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VGA_R[3] <= line[hc*12+3];
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VGA_G[0] <= line[hc*12+4];
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VGA_G[0] <= line[hc*12+4];
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VGA_B[0] <= 1;
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VGA_B[0] <= 1;
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VGA_B[1] <= 0;
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VGA_B[1] <= 0;
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VGA_B[2] <= 1;
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VGA_B[2] <= 1;
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VGA_B[3] <= 0;
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VGA_B[3] <= 0;
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end
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end
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else begin
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VGA_R[0] <= 0;
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VGA_G[0] <= 0;
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VGA_B[0] <= 0;
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VGA_R[1] <= 0;
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VGA_G[1] <= 0;
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VGA_B[1] <= 0;
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VGA_R[2] <= 0;
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VGA_G[2] <= 0;
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VGA_B[2] <= 0;
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VGA_R[3] <= 0;
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VGA_G[3] <= 0;
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VGA_B[3] <= 0;
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end
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end
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end
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end
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else begin
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VGA_R[0] <= 0;
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VGA_G[0] <= 0;
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VGA_B[0] <= 0;
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VGA_R[1] <= 0;
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VGA_G[1] <= 0;
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VGA_B[1] <= 0;
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VGA_R[2] <= 0;
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VGA_G[2] <= 0;
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VGA_B[2] <= 0;
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VGA_R[3] <= 0;
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VGA_G[3] <= 0;
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VGA_B[3] <= 0;
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end
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end
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/* if (vc < 240) begin
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VGA_R[0] <= 1;
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VGA_G[0] <= 1;
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VGA_B[0] <= 1;
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VGA_R[1] <= 1;
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VGA_G[1] <= 1;
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VGA_B[1] <= 1;
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VGA_R[2] <= 1;
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VGA_G[2] <= 1;
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VGA_B[2] <= 1;
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VGA_R[3] <= 1;
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VGA_G[3] <= 1;
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VGA_B[3] <= 1;
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end
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else begin
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VGA_R[0] <= 0;
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VGA_G[0] <= 0;
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VGA_B[0] <= 1;
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VGA_R[1] <= 0;
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VGA_G[1] <= 0;
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VGA_B[1] <= 1;
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VGA_R[2] <= 0;
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VGA_G[2] <= 0;
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VGA_B[2] <= 1;
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VGA_R[3] <= 0;
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VGA_G[3] <= 0;
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VGA_B[3] <= 1;
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end
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end
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else begin
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if (vc < 240) begin
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VGA_R[0] <= 1;
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VGA_G[0] <= 0;
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VGA_B[0] <= 0;
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VGA_R[1] <= 1;
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VGA_G[1] <= 0;
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VGA_B[1] <= 0;
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VGA_R[2] <= 1;
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VGA_G[2] <= 0;
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VGA_B[2] <= 0;
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VGA_R[3] <= 1;
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VGA_G[3] <= 0;
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VGA_B[3] <= 0;
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end
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else begin
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VGA_R[0] <= 0;
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VGA_G[0] <= 1;
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VGA_B[0] <= 0;
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VGA_R[1] <= 0;
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VGA_G[1] <= 1;
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VGA_B[1] <= 0;
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VGA_R[2] <= 0;
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VGA_G[2] <= 1;
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VGA_B[2] <= 0;
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VGA_R[3] <= 0;
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VGA_G[3] <= 1;
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VGA_B[3] <= 0;
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end
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end
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end
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*/
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end
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else begin
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VGA_R[0] <= 0;
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VGA_G[0] <= 0;
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VGA_B[0] <= 0;
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VGA_R[1] <= 0;
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VGA_G[1] <= 0;
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VGA_B[1] <= 0;
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VGA_R[2] <= 0;
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VGA_G[2] <= 0;
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VGA_B[2] <= 0;
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VGA_R[3] <= 0;
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VGA_G[3] <= 0;
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VGA_B[3] <= 0;
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end
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end
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end
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assign vidon = (hc < 640 && vc < 480) ? 1 : 0;
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assign vidon = (hc < 640 && vc < 480) ? 1 : 0;
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endmodule
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endmodule
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