//==============================================================
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//==============================================================
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// Test PLA decode and combinatorial static execute
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// Test PLA decode and combinatorial static execute
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//==============================================================
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//==============================================================
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`timescale 100 ns/ 100 ns
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`timescale 100 ns/ 100 ns
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module test_decode;
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module test_decode;
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reg [7:0] ir_sig;
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reg [7:0] ir_sig;
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reg [4:0] prefix_sig;
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reg [4:0] prefix_sig;
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wire [107:0] pla_sig;
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wire [107:0] pla_sig;
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// ----------------- TEST -------------------
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// ----------------- TEST -------------------
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initial begin
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initial begin
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integer opcode;
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integer opcode;
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// Test every opcode in the first table
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// Test every opcode in the first table
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//================================================
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//================================================
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// Regular instructions with no prefix
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// Regular instructions with no prefix
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//================================================
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//================================================
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$display("START IXY0:XX");
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$display("START IXY0:XX");
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opcode = 0;
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opcode = 0;
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while(opcode<256) begin
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while(opcode<256) begin
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#1 $display("OPCODE: 0x%2H", opcode);
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#1 $display("OPCODE: 0x%2H", opcode);
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prefix_sig[4:0] = 5'b10100;
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prefix_sig[4:0] = 5'b10100;
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ir_sig[7:0] = opcode;
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ir_sig[7:0] = opcode;
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#1 // Reset the IR into NOP so we get the trigger signal again
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#1 // Reset the IR into NOP so we get the trigger signal again
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prefix_sig[4:0] = 5'b01100;
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prefix_sig[4:0] = 5'b01100;
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ir_sig[7:0] = 0;
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ir_sig[7:0] = 0;
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opcode++;
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opcode++;
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end
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end
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#1 $display("END");
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#1 $display("END");
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//================================================
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//================================================
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// Regular instructions with IX/IY prefix
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// Regular instructions with IX/IY prefix
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//================================================
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//================================================
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$display("START IXY1:XX");
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$display("START IXY1:XX");
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opcode = 0;
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opcode = 0;
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while(opcode<256) begin
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while(opcode<256) begin
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#1 $display("OPCODE: 0x%2H", opcode);
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#1 $display("OPCODE: 0x%2H", opcode);
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prefix_sig[4:0] = 5'b01100;
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prefix_sig[4:0] = 5'b01100;
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ir_sig[7:0] = opcode;
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ir_sig[7:0] = opcode;
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#1 // Reset the IR into NOP so we get the trigger signal again
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#1 // Reset the IR into NOP so we get the trigger signal again
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prefix_sig[4:0] = 5'b01100;
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prefix_sig[4:0] = 5'b01100;
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ir_sig[7:0] = 0;
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ir_sig[7:0] = 0;
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opcode++;
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opcode++;
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end
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end
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#1 $display("END");
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#1 $display("END");
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//================================================
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//================================================
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// CD instructions with no prefix
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// CD instructions with no prefix
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//================================================
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//================================================
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$display("START IXY0:CB");
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$display("START IXY0:CB");
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opcode = 0;
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opcode = 0;
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while(opcode<256) begin
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while(opcode<256) begin
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#1 $display("OPCODE: 0x%2H", opcode);
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#1 $display("OPCODE: 0x%2H", opcode);
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prefix_sig[4:0] = 5'b10010;
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prefix_sig[4:0] = 5'b10010;
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ir_sig[7:0] = opcode;
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ir_sig[7:0] = opcode;
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#1 // Reset the IR into NOP so we get the trigger signal again
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#1 // Reset the IR into NOP so we get the trigger signal again
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prefix_sig[4:0] = 5'b01100;
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prefix_sig[4:0] = 5'b01100;
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ir_sig[7:0] = 0;
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ir_sig[7:0] = 0;
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opcode++;
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opcode++;
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end
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end
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#1 $display("END");
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#1 $display("END");
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//================================================
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//================================================
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// CB instructions with IX/IY prefix
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// CB instructions with IX/IY prefix
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//================================================
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//================================================
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$display("START IXY1:CB");
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$display("START IXY1:CB");
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opcode = 0;
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opcode = 0;
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while(opcode<256) begin
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while(opcode<256) begin
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#1 $display("OPCODE: 0x%2H", opcode);
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#1 $display("OPCODE: 0x%2H", opcode);
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prefix_sig[4:0] = 5'b01010;
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prefix_sig[4:0] = 5'b01010;
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ir_sig[7:0] = opcode;
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ir_sig[7:0] = opcode;
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#1 // Reset the IR into NOP so we get the trigger signal again
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#1 // Reset the IR into NOP so we get the trigger signal again
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prefix_sig[4:0] = 5'b01100;
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prefix_sig[4:0] = 5'b01100;
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ir_sig[7:0] = 0;
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ir_sig[7:0] = 0;
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opcode++;
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opcode++;
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end
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end
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#1 $display("END");
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#1 $display("END");
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//================================================
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//================================================
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// ED instructions with no prefix
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// ED instructions with no prefix
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//================================================
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//================================================
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$display("START IXY0:ED");
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$display("START IXY0:ED");
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opcode = 0;
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opcode = 0;
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while(opcode<256) begin
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while(opcode<256) begin
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#1 $display("OPCODE: 0x%2H", opcode);
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#1 $display("OPCODE: 0x%2H", opcode);
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prefix_sig[4:0] = 5'b10001;
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prefix_sig[4:0] = 5'b10001;
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ir_sig[7:0] = opcode;
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ir_sig[7:0] = opcode;
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#1 // Reset the IR into NOP so we get the trigger signal again
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#1 // Reset the IR into NOP so we get the trigger signal again
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prefix_sig[4:0] = 5'b01100;
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prefix_sig[4:0] = 5'b01100;
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ir_sig[7:0] = 0;
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ir_sig[7:0] = 0;
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opcode++;
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opcode++;
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end
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end
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#1 $display("END");
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#1 $display("END");
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//================================================
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//================================================
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// ED instructions with IX/IY prefix
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// ED instructions with IX/IY prefix
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//================================================
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//================================================
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$display("START IXY1:ED");
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$display("START IXY1:ED");
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opcode = 0;
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opcode = 0;
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while(opcode<256) begin
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while(opcode<256) begin
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#1 $display("OPCODE: 0x%2H", opcode);
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#1 $display("OPCODE: 0x%2H", opcode);
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prefix_sig[4:0] = 5'b01001;
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prefix_sig[4:0] = 5'b01001;
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ir_sig[7:0] = opcode;
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ir_sig[7:0] = opcode;
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#1 // Reset the IR into NOP so we get the trigger signal again
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#1 // Reset the IR into NOP so we get the trigger signal again
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prefix_sig[4:0] = 5'b01001;
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prefix_sig[4:0] = 5'b01001;
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ir_sig[7:0] = 0;
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ir_sig[7:0] = 0;
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opcode++;
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opcode++;
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end
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end
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#1 $display("END");
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#1 $display("END");
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end
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end
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//--------------------------------------------------------------
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//--------------------------------------------------------------
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// Instantiate decode blocks
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// Instantiate decode blocks
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//--------------------------------------------------------------
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//--------------------------------------------------------------
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pla_decode pla_decode_inst
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pla_decode pla_decode_inst
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(
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(
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.prefix(prefix_sig) , // input [6:0] prefix_sig
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.prefix(prefix_sig) , // input [6:0] prefix_sig
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.opcode(ir_sig) , // input [7:0] opcode
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.opcode(ir_sig) , // input [7:0] opcode
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.pla(pla_sig) // output [104:0] pla_sig
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.pla(pla_sig) // output [104:0] pla_sig
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);
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);
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execute execute_inst
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execute execute_inst
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(
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(
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.pla(pla_sig) , // input [107:0] pla_sig
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.pla(pla_sig) , // input [107:0] pla_sig
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.M1(M1_sig) , // input M1_sig
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.M1(M1_sig) , // input M1_sig
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.M2(M2_sig) , // input M2_sig
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.M2(M2_sig) , // input M2_sig
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.M3(M3_sig) , // input M3_sig
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.M3(M3_sig) , // input M3_sig
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.M4(M4_sig) , // input M4_sig
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.M4(M4_sig) , // input M4_sig
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.M5(M5_sig) , // input M5_sig
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.M5(M5_sig) , // input M5_sig
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.M6(M6_sig) , // input M6_sig
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.T1(T1_sig) , // input T1_sig
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.T1(T1_sig) , // input T1_sig
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.T2(T2_sig) , // input T2_sig
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.T2(T2_sig) , // input T2_sig
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.T3(T3_sig) , // input T3_sig
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.T3(T3_sig) , // input T3_sig
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.T4(T4_sig) , // input T4_sig
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.T4(T4_sig) , // input T4_sig
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.T5(T5_sig) , // input T5_sig
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.T5(T5_sig) , // input T5_sig
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.T6(T6_sig) , // input T6_sig
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.T6(T6_sig) , // input T6_sig
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.nextM(nextM_sig) , // output nextM_sig
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.nextM(nextM_sig) , // output nextM_sig
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.setM1(setM1_sig) , // output setM1_sig
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.setM1(setM1_sig) , // output setM1_sig
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.setM1ss(setM1ss_sig) , // output setM1ss_sig
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.setM1ss(setM1ss_sig) , // output setM1ss_sig
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.setM1cc(setM1cc_sig) , // output setM1cc_sig
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.setM1cc(setM1cc_sig) , // output setM1cc_sig
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.setM1bz(setM1bz_sig) , // output setM1bz_sig
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.setM1bz(setM1bz_sig) , // output setM1bz_sig
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.fFetch(fFetch_sig) , // output fFetch_sig
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.fFetch(fFetch_sig) , // output fFetch_sig
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.fMRead(fMRead_sig) , // output fMRead_sig
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.fMRead(fMRead_sig) , // output fMRead_sig
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.fMWrite(fMWrite_sig) , // output fMWrite_sig
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.fMWrite(fMWrite_sig) , // output fMWrite_sig
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.fIORead(fIORead_sig) , // output fIORead_sig
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.fIORead(fIORead_sig) , // output fIORead_sig
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.fIOWrite(fIOWrite_sig) , // output fIOWrite_sig
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.fIOWrite(fIOWrite_sig) , // output fIOWrite_sig
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.FIntr(FIntr_sig) , // output FIntr_sig
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.FIntr(FIntr_sig) , // output FIntr_sig
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.ctl_bus_sw1(ctl_bus_sw1_sig) , // output ctl_bus_sw1_sig
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.ctl_bus_sw1(ctl_bus_sw1_sig) , // output ctl_bus_sw1_sig
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.ctl_bus_sw2(ctl_bus_sw2_sig) , // output ctl_bus_sw2_sig
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.ctl_bus_sw2(ctl_bus_sw2_sig) , // output ctl_bus_sw2_sig
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.ctl_bus_sw4(ctl_bus_sw4_sig) , // output ctl_bus_sw4_sig
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.ctl_bus_sw4(ctl_bus_sw4_sig) , // output ctl_bus_sw4_sig
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.ctl_al_we(ctl_al_we_sig) , // output ctl_al_we_sig
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.ctl_al_we(ctl_al_we_sig) , // output ctl_al_we_sig
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.ctl_inc_dec(ctl_inc_dec_sig) , // output ctl_inc_dec_sig
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.ctl_inc_dec(ctl_inc_dec_sig) , // output ctl_inc_dec_sig
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.ctl_inc_limit6(ctl_inc_limit6_sig) , // output ctl_inc_limit6_sig
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.ctl_inc_limit6(ctl_inc_limit6_sig) , // output ctl_inc_limit6_sig
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.ctl_inc_cy(ctl_inc_cy_sig) , // output ctl_inc_cy_sig
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.ctl_inc_cy(ctl_inc_cy_sig) , // output ctl_inc_cy_sig
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.ctl_ab_mux_inc(ctl_ab_mux_inc_sig) , // output ctl_ab_mux_inc_sig
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.ctl_ab_mux_inc(ctl_ab_mux_inc_sig) , // output ctl_ab_mux_inc_sig
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.explode(explode_sig) // output explode_sig
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.explode(explode_sig) // output explode_sig
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);
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);
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endmodule
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endmodule
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