/* dbg_api.c -- JTAG protocol bridge between GDB and Advanced debug module.
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/* dbg_api.c -- JTAG protocol bridge between GDB and Advanced debug module.
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Copyright(C) Nathan Yawn, nyawn@opencores.net
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Copyright(C) Nathan Yawn, nyawn@opencores.net
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based on code from jp2 by Marko Mlinar, markom@opencores.org
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based on code from jp2 by Marko Mlinar, markom@opencores.org
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This file contains API functions which may be called from the GDB
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This file contains API functions which may be called from the GDB
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interface server. These functions call the appropriate hardware-
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interface server. These functions call the appropriate hardware-
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specific functions for the advanced debug interface or the legacy
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specific functions for the advanced debug interface or the legacy
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debug interface, depending on which is selected.
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debug interface, depending on which is selected.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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*/
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#include <stdio.h>
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#include <stdio.h>
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#include <pthread.h> // for mutexes
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#include <pthread.h> // for mutexes
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#include <arpa/inet.h> // for ntohl()
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#include <arpa/inet.h> // for ntohl()
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#include "adv_dbg_commands.h"
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#include "adv_dbg_commands.h"
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#include "legacy_dbg_commands.h"
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#include "legacy_dbg_commands.h"
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#include "errcodes.h"
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#include "errcodes.h"
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#define debug(...) //fprintf(stderr, __VA_ARGS__ )
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#define debug(...) //fprintf(stderr, __VA_ARGS__ )
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#define DBG_HW_ADVANCED 1
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#define DBG_HW_ADVANCED 1
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#define DBG_HW_LEGACY 2
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#define DBG_HW_LEGACY 2
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#ifdef __LEGACY__
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#ifdef __LEGACY__
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#warning Compiling for LEGACY debug hardware!
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#warning Compiling for LEGACY debug hardware!
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#define DEBUG_HARDWARE DBG_HW_LEGACY
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#define DEBUG_HARDWARE DBG_HW_LEGACY
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#else
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#else
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#warning Compiling for ADVANCED debug unit!
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#warning Compiling for ADVANCED debug unit!
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#define DEBUG_HARDWARE DBG_HW_ADVANCED
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#define DEBUG_HARDWARE DBG_HW_ADVANCED
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#endif
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#endif
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pthread_mutex_t dbg_access_mutex = PTHREAD_MUTEX_INITIALIZER;
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pthread_mutex_t dbg_access_mutex = PTHREAD_MUTEX_INITIALIZER;
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/* read a word from wishbone */
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/* read a word from wishbone */
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int dbg_wb_read32(unsigned long adr, unsigned long *data) {
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int dbg_wb_read32(unsigned long adr, unsigned long *data) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts
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err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts
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}
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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{
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
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err = legacy_dbg_go((unsigned char*)data, 4, 1);
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err = legacy_dbg_go((unsigned char*)data, 4, 1);
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*data = ntohl(*data);
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*data = ntohl(*data);
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}
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}
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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/* write a word to wishbone */
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/* write a word to wishbone */
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int dbg_wb_write32(unsigned long adr, unsigned long data) {
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int dbg_wb_write32(unsigned long adr, unsigned long data) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
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err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
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}
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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{
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data = ntohl(data);
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data = ntohl(data);
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
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err = legacy_dbg_go((unsigned char*)&data, 4, 0);
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err = legacy_dbg_go((unsigned char*)&data, 4, 0);
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}
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}
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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// write a word to wishbone
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// write a word to wishbone
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// Never actually called from the GDB interface
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// Never actually called from the GDB interface
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int dbg_wb_write16(unsigned long adr, uint16_t data) {
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int dbg_wb_write16(unsigned long adr, uint16_t data) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_write((void *)&data, 2, 1, adr);
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err = adbg_wb_burst_write((void *)&data, 2, 1, adr);
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}
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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{
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data = ntohs(data);
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data = ntohs(data);
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))
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err = legacy_dbg_go((unsigned char*)&data, 2, 0);
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err = legacy_dbg_go((unsigned char*)&data, 2, 0);
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}
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}
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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// write a word to wishbone
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// write a word to wishbone
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// Never actually called from the GDB interface
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// Never actually called from the GDB interface
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int dbg_wb_write8(unsigned long adr, uint8_t data) {
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int dbg_wb_write8(unsigned long adr, uint8_t data) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_write((void *)&data, 1, 1, adr);
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err = adbg_wb_burst_write((void *)&data, 1, 1, adr);
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}
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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{
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))
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err = legacy_dbg_go((unsigned char*)&data, 1, 0);
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err = legacy_dbg_go((unsigned char*)&data, 1, 0);
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}
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}
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len) {
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int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
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if(!len)
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_read(4, len, adr, (void *)data); // 'len' is words.
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err = adbg_wb_burst_read(4, len, adr, (void *)data); // 'len' is words.
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}
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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{
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int i;
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int i;
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int bytelen = len<<2;
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int bytelen = len<<2;
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))
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if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes
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if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes
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for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
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for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
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}
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}
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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// Never actually called from the GDB interface
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// Never actually called from the GDB interface
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int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len) {
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int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
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if(!len)
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_read(2, len, adr, (void *)data); // 'len' is 16-bit halfwords
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err = adbg_wb_burst_read(2, len, adr, (void *)data); // 'len' is 16-bit halfwords
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}
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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{
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int i;
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int i;
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int bytelen = len<<1;
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int bytelen = len<<1;
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))
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if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is halfwords, call wants bytes
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if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is halfwords, call wants bytes
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for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
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for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
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}
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}
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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// Never actually called from the GDB interface
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// Never actually called from the GDB interface
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int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len) {
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int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
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if(!len)
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_read(1, len, adr, (void *)data); // *** is 'len' bits or words?? Call wants words...
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err = adbg_wb_burst_read(1, len, adr, (void *)data); // *** is 'len' bits or words?? Call wants words...
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}
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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{
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))
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err = legacy_dbg_go((unsigned char*)data, len, 1);
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err = legacy_dbg_go((unsigned char*)data, len, 1);
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}
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}
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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// write a block to wishbone
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// write a block to wishbone
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int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len) {
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int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len) {
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int err;
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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pthread_mutex_lock(&dbg_access_mutex);
|
|
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if(!len)
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
|
return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
|
|
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
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if ((err = adbg_select_module(DC_WISHBONE)))
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if ((err = adbg_select_module(DC_WISHBONE)))
|
{
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{
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pthread_mutex_unlock(&dbg_access_mutex);
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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return err;
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}
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}
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err = adbg_wb_burst_write((void *)data, 4, len, adr); // 'len' is words.
|
err = adbg_wb_burst_write((void *)data, 4, len, adr); // 'len' is words.
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
int i;
|
int i;
|
int bytelen = len << 2;
|
int bytelen = len << 2;
|
for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
|
for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is words, call wants bytes
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is words, call wants bytes
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
// write a block to wishbone
|
// write a block to wishbone
|
// Never actually called from the GDB interface
|
// Never actually called from the GDB interface
|
int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len) {
|
int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len) {
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(!len)
|
if(!len)
|
return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
|
return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)data, 2, len, adr); // 'len' is (half)words
|
err = adbg_wb_burst_write((void *)data, 2, len, adr); // 'len' is (half)words
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
int i;
|
int i;
|
int bytelen = len<<1;
|
int bytelen = len<<1;
|
for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
|
for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is 16-bit halfwords, call wants bytes
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is 16-bit halfwords, call wants bytes
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
// write a block to wishbone
|
// write a block to wishbone
|
int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len) {
|
int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len) {
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(!len)
|
if(!len)
|
return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
|
return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)data, 1, len, adr); // 'len' is in words...
|
err = adbg_wb_burst_write((void *)data, 1, len, adr); // 'len' is in words...
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))
|
err = legacy_dbg_go((unsigned char*)data, len, 0);
|
err = legacy_dbg_go((unsigned char*)data, len, 0);
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
/* read a register from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
/* read a register from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
int dbg_cpu0_read(unsigned long adr, unsigned long *data) {
|
int dbg_cpu0_read(unsigned long adr, unsigned long *data) {
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))
|
*data = ntohl(*data);
|
*data = ntohl(*data);
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);
|
debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* read multiple registers from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
/* read multiple registers from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count) {
|
int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count) {
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts
|
err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
int i;
|
int i;
|
unsigned long readaddr = adr;
|
unsigned long readaddr = adr;
|
err = APP_ERR_NONE;
|
err = APP_ERR_NONE;
|
for(i = 0; i < count; i++) {
|
for(i = 0; i < count; i++) {
|
err |= dbg_cpu0_read(readaddr++, &data[i]);
|
err |= dbg_cpu0_read(readaddr++, &data[i]);
|
}
|
}
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);
|
debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* write a cpu register to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
/* write a cpu register to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
int dbg_cpu0_write(unsigned long adr, unsigned long data) {
|
int dbg_cpu0_write(unsigned long adr, unsigned long data) {
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
data = ntohl(data);
|
data = ntohl(data);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
}
|
}
|
debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);
|
debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* write multiple cpu registers to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
/* write multiple cpu registers to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count) {
|
int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count) {
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)data, 4, count, adr);
|
err = adbg_wb_burst_write((void *)data, 4, count, adr);
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
int i;
|
int i;
|
unsigned long writeaddr = adr;
|
unsigned long writeaddr = adr;
|
err = APP_ERR_NONE;
|
err = APP_ERR_NONE;
|
for(i = 0; i < count; i++) {
|
for(i = 0; i < count; i++) {
|
err |= dbg_cpu0_write(writeaddr++, data[i]);
|
err |= dbg_cpu0_write(writeaddr++, data[i]);
|
}
|
}
|
}
|
}
|
debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);
|
debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* write a debug unit cpu module register
|
/* write a debug unit cpu module register
|
* Since OR32 debug module has only 1 register,
|
* Since OR32 debug module has only 1 register,
|
* adr is ignored (for now) */
|
* adr is ignored (for now) */
|
int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data) {
|
int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data) {
|
int err = APP_ERR_NONE;
|
int err = APP_ERR_NONE;
|
uint32_t dataword = data;
|
uint32_t dataword = data;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0))) {
|
if ((err = adbg_select_module(DC_CPU0))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
err = legacy_dbg_ctrl(data & 2, data &1);
|
err = legacy_dbg_ctrl(data & 2, data &1);
|
}
|
}
|
debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);
|
debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
/* read a register from cpu module of the debug unit.
|
/* read a register from cpu module of the debug unit.
|
* Currently, there is only 1 register, so we do not need to select it, adr is ignored
|
* Currently, there is only 1 register, so we do not need to select it, adr is ignored
|
*/
|
*/
|
int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data) {
|
int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data) {
|
int err = APP_ERR_NONE;
|
int err = APP_ERR_NONE;
|
uint32_t dataword;
|
uint32_t dataword;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
// reset is bit 1, stall is bit 0 in *data
|
// reset is bit 1, stall is bit 0 in *data
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0))) {
|
if ((err = adbg_select_module(DC_CPU0))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
*data = dataword;
|
*data = dataword;
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
int r, s;
|
int r, s;
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
err = legacy_dbg_ctrl_read(&r, &s);
|
err = legacy_dbg_ctrl_read(&r, &s);
|
*data = (r << 1) | s;
|
*data = (r << 1) | s;
|
debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);
|
debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);
|
}
|
}
|
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
// CPU1 Functions. Note that 2 CPUs are not currently supported by GDB, so these are never actually
|
// CPU1 Functions. Note that 2 CPUs are not currently supported by GDB, so these are never actually
|
// called from the GDB interface. They are included for completeness and future use.
|
// called from the GDB interface. They are included for completeness and future use.
|
// read a register from cpu1
|
// read a register from cpu1
|
int dbg_cpu1_read(unsigned long adr, unsigned long *data)
|
int dbg_cpu1_read(unsigned long adr, unsigned long *data)
|
{
|
{
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU1)))
|
if ((err = adbg_select_module(DC_CPU1)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)data, 4, 1);
|
err = legacy_dbg_go((unsigned char*)data, 4, 1);
|
*data = ntohl(*data);
|
*data = ntohl(*data);
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
// write a cpu register
|
// write a cpu register
|
int dbg_cpu1_write(unsigned long adr, unsigned long data)
|
int dbg_cpu1_write(unsigned long adr, unsigned long data)
|
{
|
{
|
int err;
|
int err;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
data = ntohl(data);
|
data = ntohl(data);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
// write a debug unit cpu module register
|
// write a debug unit cpu module register
|
int dbg_cpu1_write_ctrl(unsigned long adr, unsigned char data) {
|
int dbg_cpu1_write_ctrl(unsigned long adr, unsigned char data) {
|
int err;
|
int err;
|
uint32_t dataword = data;
|
uint32_t dataword = data;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU1))) {
|
if ((err = adbg_select_module(DC_CPU1))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
err = legacy_dbg_ctrl(data & 2, data & 1);
|
err = legacy_dbg_ctrl(data & 2, data & 1);
|
}
|
}
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
// read a debug unit cpu module register
|
// read a debug unit cpu module register
|
int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data) {
|
int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data) {
|
int err;
|
int err;
|
uint32_t dataword;
|
uint32_t dataword;
|
pthread_mutex_lock(&dbg_access_mutex);
|
pthread_mutex_lock(&dbg_access_mutex);
|
|
|
// reset is bit 1, stall is bit 0 in *data
|
// reset is bit 1, stall is bit 0 in *data
|
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU1))) {
|
if ((err = adbg_select_module(DC_CPU1))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
*data = dataword;
|
*data = dataword;
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
int r, s;
|
int r, s;
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
err = legacy_dbg_ctrl_read(&r, &s);
|
err = legacy_dbg_ctrl_read(&r, &s);
|
*data = (r << 1) | s;
|
*data = (r << 1) | s;
|
}
|
}
|
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
|
|
|
|
