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/* $Id: corefunc.hh,v 1.4 2008-05-11 13:51:50 sybreon Exp $
/* $Id: corefunc.hh,v 1.4 2008-05-11 13:51:50 sybreon Exp $
**
**
** AEMB Function Verification C++ Testbench
** AEMB Function Verification C++ Testbench
** Copyright (C) 2004-2008 Shawn Tan 
** Copyright (C) 2004-2008 Shawn Tan 
**
**
** This file is part of AEMB.
** This file is part of AEMB.
**
**
** AEMB is free software: you can redistribute it and/or modify it
** AEMB is free software: you can redistribute it and/or modify it
** under the terms of the GNU General Public License as published by
** under the terms of the GNU General Public License as published by
** the Free Software Foundation, either version 3 of the License, or
** the Free Software Foundation, either version 3 of the License, or
** (at your option) any later version.
** (at your option) any later version.
**
**
** AEMB is distributed in the hope that it will be useful, but WITHOUT
** AEMB is distributed in the hope that it will be useful, but WITHOUT
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
** or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
** or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
** License for more details.
** License for more details.
**
**
** You should have received a copy of the GNU General Public License
** You should have received a copy of the GNU General Public License
** along with AEMB.  If not, see .
** along with AEMB.  If not, see .
*/
*/
/**
/**
AEMB Software Verification
AEMB Software Verification
@file corefunc.hh
@file corefunc.hh
These are custom functions written to test certain hardware functions
These are custom functions written to test certain hardware functions
that cannot be tested through numerical algorithms.
that cannot be tested through numerical algorithms.
*/
*/
#ifndef COREFUNC_HH
#ifndef COREFUNC_HH
#define COREFUNC_HH
#define COREFUNC_HH
 
 
#define MAGIC 0xAE62AE62 // magic number
#ifdef __cplusplus
 
extern "C" {
 
#endif
 
 
 
#define MAGIC 0xAE63AE63 // magic number
 
 
 
volatile int exce = 0;
 
 
 
void exceptionHandler()
 
{
 
  exce++; // flag the exception service routine
 
}
 
 
 
 
 
volatile void _hw_exception_handler()
 
{
 
  //exceptionHandler();
 
  exce++;
 
  asm volatile (//"lwi r15,r1,0\n"
 
                "rted r17, 0\n"
 
                "nop\n");
 
  //"addik r1,r1,28\n");
 
}
 
 
 
/**
 
EXCEPTION TEST ROUTINE
 
*/
 
 
 
int exceptionTest(int timeout)
 
{
 
  volatile int *toggle = (int *)0xFFFFFFE2;
 
  // enable exceptions
 
  asm volatile (".long 0xDEADC0DE"); // define illegal instruction (1 error)
 
  *toggle = *toggle; // test unaligned memory access (2 errors)
 
  // disable exceptions
 
  return (exce != 3) ? EXIT_FAILURE : EXIT_SUCCESS;
 
}
 
 
volatile int intr = 0;
volatile int intr = 0;
void __attribute__ ((interrupt_handler)) interruptHandler()
void __attribute__ ((interrupt_handler)) interruptHandler()
{
{
  int *toggle = (int *)0xFFFFFFE0;
  int *toggle = (int *)0xFFFFFFE0;
  intr++; // flag the interrupt service routine
  intr++; // flag the interrupt service routine
  *toggle = -1; // disable interrupts
  *toggle = -1; // disable interrupts
}
}
/**
/**
INTERRUPT TEST ROUTINE
INTERRUPT TEST ROUTINE
*/
*/
int interruptTest(int timeout)
int interruptTest(int timeout)
{
{
  aembEnableInterrupts();
  aembEnableInterrupts();
  for (int timer=0; (timer < timeout * 100); ++timer)
  for (int timer=0; (timer < timeout * 100); ++timer)
    asm volatile ("nop"); // delay loop
    asm volatile ("nop"); // delay loop
  aembDisableInterrupts();
  aembDisableInterrupts();
  return (intr == 0) ? EXIT_FAILURE : EXIT_SUCCESS;
  return (intr == 0) ? EXIT_FAILURE : EXIT_SUCCESS;
}
}
/**
/**
   FSL TEST ROUTINE
   FSL TEST ROUTINE
*/
*/
int xslTest (int code)
int xslTest (int code)
{
{
  // TEST FSL1 ONLY
  // TEST FSL1 ONLY
  int FSL = code;
  int FSL = code;
  asm ("PUT %0, RFSL0" :: "r"(FSL));
  asm ("PUT %0, RFSL0" :: "r"(FSL));
  asm ("GET %0, RFSL0" : "=r"(FSL));
  asm ("GET %0, RFSL0" : "=r"(FSL));
  if (FSL != code) return EXIT_FAILURE;
  if (FSL != code) return EXIT_FAILURE;
  asm ("PUT %0, RFSL31" :: "r"(FSL));
  asm ("PUT %0, RFSL31" :: "r"(FSL));
  asm ("GET %0, RFSL31" : "=r"(FSL));
  asm ("GET %0, RFSL31" : "=r"(FSL));
  if (FSL != code) return EXIT_FAILURE;
  if (FSL != code) return EXIT_FAILURE;
  return EXIT_SUCCESS;
  return EXIT_SUCCESS;
}
}
/**
/**
   MALLOC TEST
   MALLOC TEST
   Works well with newlib malloc routine. Do some patterned tests.
   Works well with newlib malloc routine. Do some patterned tests.
*/
*/
int memoryTest(int size)
int memoryTest(int size)
{
{
  volatile void *alloc;
  volatile void *alloc;
  int magic;
  int magic;
  alloc = malloc(size * sizeof(int)); // allocate 32 byte
  alloc = malloc(size * sizeof(int)); // allocate 32 byte
  if (alloc == NULL)
  if (alloc == NULL)
    return EXIT_FAILURE;
    return EXIT_FAILURE;
  *(int *)alloc = MAGIC; // write to memory
  *(int *)alloc = MAGIC; // write to memory
  magic = *(int *)alloc; // read from memory
  magic = *(int *)alloc; // read from memory
  return (magic == MAGIC) ? EXIT_SUCCESS : EXIT_FAILURE;
  return (magic == MAGIC) ? EXIT_SUCCESS : EXIT_FAILURE;
}
}
 
 
 
#ifdef __cplusplus
 
}
#endif
#endif
 
 
/*
#endif
$Log: not supported by cvs2svn $
 
Revision 1.3  2008/05/01 08:37:37  sybreon
 
Added interrupt capability.
 
 
 
Revision 1.2  2008/04/28 20:30:24  sybreon
 
Changed to new headers.
 
 
 
Revision 1.1  2008/04/27 16:04:42  sybreon
 
Minor cosmetic changes.
 
 
 
*/
 
 
 

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