#!/bin/sh
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#!/bin/sh
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# $Id: gccrom,v 1.12 2007-12-11 00:44:32 sybreon Exp $
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# $Id: gccrom,v 1.13 2008-01-19 16:42:54 sybreon Exp $
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# Compile using C++ pre-processor
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mb-g++ -g -Wl,-defsym -Wl,_HEAP_SIZE=0x800 -mxl-soft-div -msoft-float -mxl-barrel-shift -mno-xl-soft-mul -mno-clearbss $@ -o rom.elf -lc_m_bs -lm_m_bs && \
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# Create a text listing of the compiled code
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mb-objdump -DSC rom.elf > rom.dump && \
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# Convert the ELF file to an SREC file
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mb-objcopy -O srec rom.elf rom.srec && \
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# Generate a Verilog VMEM file from the SREC file
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srec_cat rom.srec -o ../sim/dump.vmem -vmem 32 && \
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# Cleanup code
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rm rom.srec && \
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# Say Cheeze!
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echo "ROM generated"
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# $Log: not supported by cvs2svn $
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# $Log: not supported by cvs2svn $
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# Revision 1.12 2007/12/11 00:44:32 sybreon
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# Modified for AEMB2
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#
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# Revision 1.11 2007/11/30 17:09:27 sybreon
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# Revision 1.11 2007/11/30 17:09:27 sybreon
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# Minor code cleanup.
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# Minor code cleanup.
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#
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#
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# Revision 1.10 2007/11/20 18:35:34 sybreon
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# Revision 1.10 2007/11/20 18:35:34 sybreon
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# Generate VMEM instead of HEX dumps of programme.
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# Generate VMEM instead of HEX dumps of programme.
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#
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#
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# Revision 1.9 2007/11/18 19:41:46 sybreon
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# Revision 1.9 2007/11/18 19:41:46 sybreon
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# Minor simulation fixes.
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# Minor simulation fixes.
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#
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#
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# Revision 1.8 2007/11/09 20:52:37 sybreon
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# Revision 1.8 2007/11/09 20:52:37 sybreon
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# Added some compilation optimisations.
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# Added some compilation optimisations.
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#
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#
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# Revision 1.7 2007/11/04 05:16:25 sybreon
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# Revision 1.7 2007/11/04 05:16:25 sybreon
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# Added -msoft-float and -mxl-soft-div compiler flags.
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# Added -msoft-float and -mxl-soft-div compiler flags.
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#
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#
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# Revision 1.6 2007/11/02 03:25:46 sybreon
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# Revision 1.6 2007/11/02 03:25:46 sybreon
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# New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
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# New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
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# Fixed various minor data hazard bugs.
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# Fixed various minor data hazard bugs.
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# Code compatible with -O0/1/2/3/s generated code.
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# Code compatible with -O0/1/2/3/s generated code.
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#
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#
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# Revision 1.5 2007/10/22 19:14:38 sybreon
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# Revision 1.5 2007/10/22 19:14:38 sybreon
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# Recommended to compile code with -O2/3/s
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# Recommended to compile code with -O2/3/s
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#
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#
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# Revision 1.4 2007/04/30 15:57:31 sybreon
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# Revision 1.4 2007/04/30 15:57:31 sybreon
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# Modified compilation sequence.
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# Modified compilation sequence.
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#
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#
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# Revision 1.3 2007/04/25 22:15:06 sybreon
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# Revision 1.3 2007/04/25 22:15:06 sybreon
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# Added support for 8-bit and 16-bit data types.
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# Added support for 8-bit and 16-bit data types.
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#
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#
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# Revision 1.2 2007/04/04 06:14:39 sybreon
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# Revision 1.2 2007/04/04 06:14:39 sybreon
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# Minor changes
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# Minor changes
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#
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#
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# Revision 1.1 2007/03/09 17:41:56 sybreon
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# Revision 1.1 2007/03/09 17:41:56 sybreon
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# initial import
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# initial import
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#
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# Compile using C++ pre-processor
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mb-g++ -g -Wl,-defsym -Wl,_STACK_SIZE=0x400 -mxl-soft-div -msoft-float -mxl-barrel-shift -mno-xl-soft-mul -o rom.elf $@ && \
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# Create a text listing of the compiled code
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mb-objdump -dSC rom.elf > rom.dump && \
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# Convert the ELF file to an SREC file
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mb-objcopy -O srec rom.elf rom.srec && \
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# Generate a Verilog VMEM file from the SREC file
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srec_cat rom.srec -o ../sim/dump.vmem -vmem 32 && \
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# Cleanup code
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rm rom.srec && \
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# Say Cheeze!
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echo "ROM generated"
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