//==================================================================
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//==================================================================
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// File: d_MouseDriver.v
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// File: d_MouseDriver.v
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// Version: 0.01
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// Version: 0.01
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// Copyright Stephen Pickett
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// Copyright Stephen Pickett
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// April 28, 2005
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// April 28, 2005
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//------------------------------------------------------------------
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//------------------------------------------------------------------
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// Revisions:
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// Revisions:
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// Ver 0.01 Apr 28, 2005 Initial Release
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// Ver 0.01 Apr 28, 2005 Initial Release
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//
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//
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//==================================================================
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//==================================================================
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|
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module Driver_mouse(
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module Driver_mouse(
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CLK_50MHZ, MASTER_RST,
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CLK_50MHZ, MASTER_RST,
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PS2C, PS2D,
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PS2C, PS2D,
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XCOORD, YCOORD,
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XCOORD, YCOORD,
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L_BUTTON, R_BUTTON, M_BUTTON
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L_BUTTON, R_BUTTON, M_BUTTON
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);
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);
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|
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//==================================================================//
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//==================================================================//
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// DEFINITIONS //
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// DEFINITIONS //
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//==================================================================//
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//==================================================================//
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parameter ss_CLK_LOW_100US = 4'b0000;
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parameter ss_CLK_LOW_100US = 4'b0000;
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parameter ss_DATA_LOW = 4'b0001;
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parameter ss_DATA_LOW = 4'b0001;
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parameter ss_SET_BIT_0 = 4'b0011;
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parameter ss_SET_BIT_0 = 4'b0011;
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parameter ss_SET_BIT_1 = 4'b0010;
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parameter ss_SET_BIT_1 = 4'b0010;
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parameter ss_SET_BIT_2 = 4'b0110;
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parameter ss_SET_BIT_2 = 4'b0110;
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parameter ss_SET_BIT_3 = 4'b0111;
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parameter ss_SET_BIT_3 = 4'b0111;
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parameter ss_SET_BIT_4 = 4'b0101;
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parameter ss_SET_BIT_4 = 4'b0101;
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parameter ss_SET_BIT_5 = 4'b0100;
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parameter ss_SET_BIT_5 = 4'b0100;
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parameter ss_SET_BIT_6 = 4'b1100;
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parameter ss_SET_BIT_6 = 4'b1100;
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parameter ss_SET_BIT_7 = 4'b1101;
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parameter ss_SET_BIT_7 = 4'b1101;
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parameter ss_SET_BIT_PARITY = 4'b1111;
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parameter ss_SET_BIT_PARITY = 4'b1111;
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parameter ss_SET_BIT_STOP = 4'b1110;
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parameter ss_SET_BIT_STOP = 4'b1110;
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parameter ss_WAIT_BIT_ACK = 4'b1010;
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parameter ss_WAIT_BIT_ACK = 4'b1010;
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parameter ss_GET_MOVEMENT = 4'b1000;
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parameter ss_GET_MOVEMENT = 4'b1000;
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|
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parameter P_Lbut_index = 1;
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parameter P_Lbut_index = 1;
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parameter P_Mbut_index = 2;
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parameter P_Mbut_index = 2;
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parameter P_Rbut_index = 3;
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parameter P_Rbut_index = 3;
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|
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|
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//==================================================================//
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//==================================================================//
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// VARIABLE DEFINITIONS //
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// VARIABLE DEFINITIONS //
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//==================================================================//
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//==================================================================//
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//----------------------//
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//----------------------//
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// INPUTS //
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// INPUTS //
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//----------------------//
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//----------------------//
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input CLK_50MHZ; // System wide clock
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input CLK_50MHZ; // System wide clock
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input MASTER_RST; // System wide reset
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input MASTER_RST; // System wide reset
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inout PS2C; // PS2 clock
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inout PS2C; // PS2 clock
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inout PS2D; // PS2 data
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inout PS2D; // PS2 data
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|
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//----------------------//
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//----------------------//
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// OUTPUTS //
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// OUTPUTS //
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//----------------------//
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//----------------------//
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output[11:0] XCOORD; // X coordinate of the cursor
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output[11:0] XCOORD; // X coordinate of the cursor
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output[11:0] YCOORD; // Y coordinate of the cursor
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output[11:0] YCOORD; // Y coordinate of the cursor
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output L_BUTTON, R_BUTTON, M_BUTTON;
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output L_BUTTON, R_BUTTON, M_BUTTON;
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|
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//----------------------//
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//----------------------//
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// WIRES / NODES //
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// WIRES / NODES //
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//----------------------//
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//----------------------//
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wire CLK_50MHZ, MASTER_RST;
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wire CLK_50MHZ, MASTER_RST;
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wire PS2C, PS2D;
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wire PS2C, PS2D;
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reg[11:0] XCOORD;
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reg[11:0] XCOORD;
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reg[11:0] YCOORD;
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reg[11:0] YCOORD;
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reg L_BUTTON, R_BUTTON, M_BUTTON;
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reg L_BUTTON, R_BUTTON, M_BUTTON;
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|
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//----------------------//
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//----------------------//
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// REGISTERS //
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// REGISTERS //
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//----------------------//
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//----------------------//
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reg[12:0] Counter_timer;
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reg[12:0] Counter_timer;
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reg[5:0] Counter_bits;
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reg[5:0] Counter_bits;
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reg[3:0] sm_ps2mouse;
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reg[3:0] sm_ps2mouse;
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reg[32:0] data_in_buf;
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reg[32:0] data_in_buf;
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//==================================================================//
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//==================================================================//
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// FUNCTIONAL DEFINITIONS //
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// FUNCTIONAL DEFINITIONS //
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//==================================================================//
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//==================================================================//
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|
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//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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// INTERMEDIATE VALUES //
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// INTERMEDIATE VALUES //
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//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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reg[7:0] Counter_PS2C;
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reg[7:0] Counter_PS2C;
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reg CLK_ps2c_debounced;
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reg CLK_ps2c_debounced;
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|
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// Debounce the PS2C line.
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// Debounce the PS2C line.
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// The mouse is generally not outputting a nice rising clock edge.
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// The mouse is generally not outputting a nice rising clock edge.
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// To eliminate the false edge detection, make sure it is high/low
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// To eliminate the false edge detection, make sure it is high/low
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// for at least 256 counts before triggering the CLK.
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// for at least 256 counts before triggering the CLK.
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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Counter_PS2C <= 8'b0;
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Counter_PS2C <= 8'b0;
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end else begin
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end else begin
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if(PS2C == 1'b1) begin
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if(PS2C == 1'b1) begin
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if(Counter_PS2C == 8'hFF)
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if(Counter_PS2C == 8'hFF)
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Counter_PS2C <= Counter_PS2C;
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Counter_PS2C <= Counter_PS2C;
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else
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else
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Counter_PS2C <= Counter_PS2C + 1;
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Counter_PS2C <= Counter_PS2C + 1;
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end else begin
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end else begin
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if(Counter_PS2C == 8'b0)
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if(Counter_PS2C == 8'b0)
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Counter_PS2C <= Counter_PS2C;
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Counter_PS2C <= Counter_PS2C;
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else
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else
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Counter_PS2C <= Counter_PS2C - 1;
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Counter_PS2C <= Counter_PS2C - 1;
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end
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end
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end
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end
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end
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end
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1)
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if(MASTER_RST == 1'b1)
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CLK_ps2c_debounced <= 1'b0;
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CLK_ps2c_debounced <= 1'b0;
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else if(Counter_PS2C == 8'b0)
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else if(Counter_PS2C == 8'b0)
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CLK_ps2c_debounced <= 1'b0;
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CLK_ps2c_debounced <= 1'b0;
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else if(Counter_PS2C == 8'hFF)
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else if(Counter_PS2C == 8'hFF)
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CLK_ps2c_debounced <= 1'b1;
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CLK_ps2c_debounced <= 1'b1;
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else
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else
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CLK_ps2c_debounced <= CLK_ps2c_debounced;
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CLK_ps2c_debounced <= CLK_ps2c_debounced;
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end
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end
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|
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//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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// INTERPRETING MOVEMENTS //
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// INTERPRETING MOVEMENTS //
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//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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reg[7:0] xcoord_buf;
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reg[7:0] xcoord_buf;
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reg[7:0] ycoord_buf;
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reg[7:0] ycoord_buf;
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|
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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xcoord_buf <= 8'b0;
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xcoord_buf <= 8'b0;
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end else if(data_in_buf[5] == 1'b0) begin
|
end else if(data_in_buf[5] == 1'b0) begin
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xcoord_buf <= data_in_buf[19:12];
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xcoord_buf <= data_in_buf[19:12];
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end else begin
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end else begin
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xcoord_buf <= ((~(data_in_buf[19:12]))+1);
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xcoord_buf <= ((~(data_in_buf[19:12]))+1);
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end
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end
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end
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end
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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ycoord_buf <= 8'b0;
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ycoord_buf <= 8'b0;
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end else if(data_in_buf[6] == 1'b0) begin
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end else if(data_in_buf[6] == 1'b0) begin
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ycoord_buf <= data_in_buf[30:23];
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ycoord_buf <= data_in_buf[30:23];
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end else begin
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end else begin
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ycoord_buf <= ((~(data_in_buf[30:23]))+1);
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ycoord_buf <= ((~(data_in_buf[30:23]))+1);
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end
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end
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end
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end
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always @ (posedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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always @ (posedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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XCOORD <= 12'd320;
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XCOORD <= 12'd320;
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end else if(Counter_bits == 6'd32 && (data_in_buf[7] == 1'b0)) begin
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end else if(Counter_bits == 6'd32 && (data_in_buf[7] == 1'b0)) begin
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if(data_in_buf[5] == 1'b1) begin // NEGITIVE
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if(data_in_buf[5] == 1'b1) begin // NEGITIVE
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if(XCOORD <= xcoord_buf)
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if(XCOORD <= xcoord_buf)
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XCOORD <= 12'b0;
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XCOORD <= 12'b0;
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else
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else
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XCOORD <= XCOORD - xcoord_buf;
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XCOORD <= XCOORD - xcoord_buf;
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end else begin // POSITIVE
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end else begin // POSITIVE
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if((XCOORD + xcoord_buf) >= 11'd639)
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if((XCOORD + xcoord_buf) >= 11'd639)
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XCOORD <= 12'd639;
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XCOORD <= 12'd639;
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else
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else
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XCOORD <= XCOORD + xcoord_buf;
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XCOORD <= XCOORD + xcoord_buf;
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end
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end
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end else begin
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end else begin
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XCOORD <= XCOORD;
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XCOORD <= XCOORD;
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end
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end
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end
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end
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always @ (posedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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always @ (posedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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YCOORD <= 12'd199;
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YCOORD <= 12'd199;
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end else if(Counter_bits == 6'd32 && (data_in_buf[8] == 1'b0)) begin
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end else if(Counter_bits == 6'd32 && (data_in_buf[8] == 1'b0)) begin
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if(data_in_buf[6] == 1'b0) begin
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if(data_in_buf[6] == 1'b0) begin
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if((YCOORD + ycoord_buf) >= 11'd479)
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if((YCOORD + ycoord_buf) >= 11'd479)
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YCOORD <= 12'd479;
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YCOORD <= 12'd479;
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else
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else
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YCOORD <= YCOORD + ycoord_buf;
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YCOORD <= YCOORD + ycoord_buf;
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end else begin
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end else begin
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if(YCOORD <= ycoord_buf)
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if(YCOORD <= ycoord_buf)
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YCOORD <= 12'd0;
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YCOORD <= 12'd0;
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else
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else
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YCOORD <= YCOORD - ycoord_buf;
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YCOORD <= YCOORD - ycoord_buf;
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end
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end
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end else begin
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end else begin
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YCOORD <= YCOORD;
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YCOORD <= YCOORD;
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end
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end
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end
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end
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|
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//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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// INTERPRETING BUTTONS //
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// INTERPRETING BUTTONS //
|
//------------------------------------------------------------------//
|
//------------------------------------------------------------------//
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
|
if(MASTER_RST == 1'b1) begin
|
if(MASTER_RST == 1'b1) begin
|
L_BUTTON <= 1'b0;
|
L_BUTTON <= 1'b0;
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M_BUTTON <= 1'b0;
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M_BUTTON <= 1'b0;
|
R_BUTTON <= 1'b0;
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R_BUTTON <= 1'b0;
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end else if(Counter_bits == 6'd32) begin
|
end else if(Counter_bits == 6'd32) begin
|
L_BUTTON <= data_in_buf[P_Lbut_index];
|
L_BUTTON <= data_in_buf[P_Lbut_index];
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M_BUTTON <= data_in_buf[P_Mbut_index];
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M_BUTTON <= data_in_buf[P_Mbut_index];
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R_BUTTON <= data_in_buf[P_Rbut_index];
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R_BUTTON <= data_in_buf[P_Rbut_index];
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end else begin
|
end else begin
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L_BUTTON <= L_BUTTON;
|
L_BUTTON <= L_BUTTON;
|
M_BUTTON <= M_BUTTON;
|
M_BUTTON <= M_BUTTON;
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R_BUTTON <= R_BUTTON;
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R_BUTTON <= R_BUTTON;
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end
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end
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end
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end
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|
|
|
|
|
|
|
//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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// SENDING DATA //
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// SENDING DATA //
|
//------------------------------------------------------------------//
|
//------------------------------------------------------------------//
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reg PS2C_out, PS2D_out;
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reg PS2C_out, PS2D_out;
|
|
|
assign PS2C = PS2C_out;
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assign PS2C = PS2C_out;
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assign PS2D = PS2D_out;
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assign PS2D = PS2D_out;
|
|
|
|
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always @ (Counter_timer or MASTER_RST) begin
|
always @ (Counter_timer or MASTER_RST) begin
|
if(MASTER_RST == 1'b1) begin
|
if(MASTER_RST == 1'b1) begin
|
PS2C_out = 1'bZ;
|
PS2C_out = 1'bZ;
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end else if((Counter_timer <= 13'd5500) && (MASTER_RST == 1'b0))
|
end else if((Counter_timer <= 13'd5500) && (MASTER_RST == 1'b0))
|
PS2C_out = 1'b0;
|
PS2C_out = 1'b0;
|
else
|
else
|
PS2C_out = 1'bZ;
|
PS2C_out = 1'bZ;
|
end
|
end
|
|
|
always @ (sm_ps2mouse or Counter_timer or MASTER_RST) begin
|
always @ (sm_ps2mouse or Counter_timer or MASTER_RST) begin
|
if(MASTER_RST == 1'b1) begin
|
if(MASTER_RST == 1'b1) begin
|
PS2D_out = 1'bZ;
|
PS2D_out = 1'bZ;
|
end else if(Counter_timer >= 13'd5000 && sm_ps2mouse == ss_DATA_LOW) begin
|
end else if(Counter_timer >= 13'd5000 && sm_ps2mouse == ss_DATA_LOW) begin
|
PS2D_out = 1'b0;
|
PS2D_out = 1'b0;
|
end else if(sm_ps2mouse == ss_SET_BIT_0) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_0) begin
|
PS2D_out = 1'b0;
|
PS2D_out = 1'b0;
|
end else if(sm_ps2mouse == ss_SET_BIT_1) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_1) begin
|
PS2D_out = 1'b0;
|
PS2D_out = 1'b0;
|
end else if(sm_ps2mouse == ss_SET_BIT_2) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_2) begin
|
PS2D_out = 1'b1;
|
PS2D_out = 1'b1;
|
end else if(sm_ps2mouse == ss_SET_BIT_3) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_3) begin
|
PS2D_out = 1'b0;
|
PS2D_out = 1'b0;
|
end else if(sm_ps2mouse == ss_SET_BIT_4) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_4) begin
|
PS2D_out = 1'b1;
|
PS2D_out = 1'b1;
|
end else if(sm_ps2mouse == ss_SET_BIT_5) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_5) begin
|
PS2D_out = 1'b1;
|
PS2D_out = 1'b1;
|
end else if(sm_ps2mouse == ss_SET_BIT_6) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_6) begin
|
PS2D_out = 1'b1;
|
PS2D_out = 1'b1;
|
end else if(sm_ps2mouse == ss_SET_BIT_7) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_7) begin
|
PS2D_out = 1'b1;
|
PS2D_out = 1'b1;
|
end else if(sm_ps2mouse == ss_SET_BIT_PARITY) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_PARITY) begin
|
PS2D_out = 1'b0;
|
PS2D_out = 1'b0;
|
end else if(sm_ps2mouse == ss_SET_BIT_STOP) begin
|
end else if(sm_ps2mouse == ss_SET_BIT_STOP) begin
|
PS2D_out = 1'b1;
|
PS2D_out = 1'b1;
|
end else begin
|
end else begin
|
PS2D_out = 1'bZ;
|
PS2D_out = 1'bZ;
|
end
|
end
|
end
|
end
|
|
|
//------------------------------------------------------------------//
|
//------------------------------------------------------------------//
|
// RECIEVING DATA //
|
// RECIEVING DATA //
|
//------------------------------------------------------------------//
|
//------------------------------------------------------------------//
|
always @ (negedge CLK_ps2c_debounced or posedge MASTER_RST) begin
|
always @ (negedge CLK_ps2c_debounced or posedge MASTER_RST) begin
|
if(MASTER_RST == 1'b1) begin
|
if(MASTER_RST == 1'b1) begin
|
data_in_buf <= 33'b0;
|
data_in_buf <= 33'b0;
|
end else if(sm_ps2mouse == ss_GET_MOVEMENT) begin
|
end else if(sm_ps2mouse == ss_GET_MOVEMENT) begin
|
data_in_buf <= data_in_buf >> 1;
|
data_in_buf <= data_in_buf >> 1;
|
data_in_buf[32] <= PS2D;
|
data_in_buf[32] <= PS2D;
|
end else
|
end else
|
data_in_buf <= data_in_buf;
|
data_in_buf <= data_in_buf;
|
end
|
end
|
|
|
|
|
|
|
//------------------------------------------------------------------//
|
//------------------------------------------------------------------//
|
// COUNTERS FOR STATE MACHINE //
|
// COUNTERS FOR STATE MACHINE //
|
//------------------------------------------------------------------//
|
//------------------------------------------------------------------//
|
// COUNTER: timer
|
// COUNTER: timer
|
always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
|
always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
|
if(MASTER_RST == 1'b1)
|
if(MASTER_RST == 1'b1)
|
Counter_timer <= 13'b0;
|
Counter_timer <= 13'b0;
|
else if(Counter_timer == 13'd6000)
|
else if(Counter_timer == 13'd6000)
|
Counter_timer <= Counter_timer;
|
Counter_timer <= Counter_timer;
|
else
|
else
|
Counter_timer <= Counter_timer + 1;
|
Counter_timer <= Counter_timer + 1;
|
end
|
end
|
|
|
// COUNTER: rec_data_bit_cnt
|
// COUNTER: rec_data_bit_cnt
|
always @ (negedge CLK_ps2c_debounced or posedge MASTER_RST) begin
|
always @ (negedge CLK_ps2c_debounced or posedge MASTER_RST) begin
|
if(MASTER_RST == 1'b1) begin
|
if(MASTER_RST == 1'b1) begin
|
Counter_bits <= 6'd22;
|
Counter_bits <= 6'd22;
|
end else if(sm_ps2mouse == ss_GET_MOVEMENT) begin
|
end else if(sm_ps2mouse == ss_GET_MOVEMENT) begin
|
if(Counter_bits == 6'd32)
|
if(Counter_bits == 6'd32)
|
Counter_bits <= 6'd0;
|
Counter_bits <= 6'd0;
|
else
|
else
|
Counter_bits <= Counter_bits + 1;
|
Counter_bits <= Counter_bits + 1;
|
end else begin
|
end else begin
|
Counter_bits <= Counter_bits;
|
Counter_bits <= Counter_bits;
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end
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end
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end
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end
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//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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// MOUSE STATE MACHINE //
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// MOUSE STATE MACHINE //
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//------------------------------------------------------------------//
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//------------------------------------------------------------------//
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always @ (negedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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always @ (negedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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sm_ps2mouse <= ss_DATA_LOW;
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sm_ps2mouse <= ss_DATA_LOW;
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end else if(sm_ps2mouse == ss_DATA_LOW) begin
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end else if(sm_ps2mouse == ss_DATA_LOW) begin
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sm_ps2mouse <= ss_SET_BIT_0;
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sm_ps2mouse <= ss_SET_BIT_0;
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end else if(sm_ps2mouse == ss_SET_BIT_0) begin
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end else if(sm_ps2mouse == ss_SET_BIT_0) begin
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sm_ps2mouse <= ss_SET_BIT_1;
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sm_ps2mouse <= ss_SET_BIT_1;
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end else if(sm_ps2mouse == ss_SET_BIT_1) begin
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end else if(sm_ps2mouse == ss_SET_BIT_1) begin
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sm_ps2mouse <= ss_SET_BIT_2;
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sm_ps2mouse <= ss_SET_BIT_2;
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end else if(sm_ps2mouse == ss_SET_BIT_2) begin
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end else if(sm_ps2mouse == ss_SET_BIT_2) begin
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sm_ps2mouse <= ss_SET_BIT_3;
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sm_ps2mouse <= ss_SET_BIT_3;
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end else if(sm_ps2mouse == ss_SET_BIT_3) begin
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end else if(sm_ps2mouse == ss_SET_BIT_3) begin
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sm_ps2mouse <= ss_SET_BIT_4;
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sm_ps2mouse <= ss_SET_BIT_4;
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end else if(sm_ps2mouse == ss_SET_BIT_4) begin
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end else if(sm_ps2mouse == ss_SET_BIT_4) begin
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sm_ps2mouse <= ss_SET_BIT_5;
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sm_ps2mouse <= ss_SET_BIT_5;
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end else if(sm_ps2mouse == ss_SET_BIT_5) begin
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end else if(sm_ps2mouse == ss_SET_BIT_5) begin
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sm_ps2mouse <= ss_SET_BIT_6;
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sm_ps2mouse <= ss_SET_BIT_6;
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end else if(sm_ps2mouse == ss_SET_BIT_6) begin
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end else if(sm_ps2mouse == ss_SET_BIT_6) begin
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sm_ps2mouse <= ss_SET_BIT_7;
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sm_ps2mouse <= ss_SET_BIT_7;
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end else if(sm_ps2mouse == ss_SET_BIT_7) begin
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end else if(sm_ps2mouse == ss_SET_BIT_7) begin
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sm_ps2mouse <= ss_SET_BIT_PARITY;
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sm_ps2mouse <= ss_SET_BIT_PARITY;
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end else if(sm_ps2mouse == ss_SET_BIT_PARITY) begin
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end else if(sm_ps2mouse == ss_SET_BIT_PARITY) begin
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sm_ps2mouse <= ss_SET_BIT_STOP;
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sm_ps2mouse <= ss_SET_BIT_STOP;
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end else if(sm_ps2mouse == ss_SET_BIT_STOP) begin
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end else if(sm_ps2mouse == ss_SET_BIT_STOP) begin
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sm_ps2mouse <= ss_WAIT_BIT_ACK;
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sm_ps2mouse <= ss_WAIT_BIT_ACK;
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end else if(sm_ps2mouse == ss_WAIT_BIT_ACK) begin
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end else if(sm_ps2mouse == ss_WAIT_BIT_ACK) begin
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sm_ps2mouse <= ss_GET_MOVEMENT;
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sm_ps2mouse <= ss_GET_MOVEMENT;
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end else if(sm_ps2mouse == ss_GET_MOVEMENT) begin
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end else if(sm_ps2mouse == ss_GET_MOVEMENT) begin
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sm_ps2mouse <= sm_ps2mouse;
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sm_ps2mouse <= sm_ps2mouse;
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end else begin
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end else begin
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sm_ps2mouse <= ss_DATA_LOW;
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sm_ps2mouse <= ss_DATA_LOW;
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end
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end
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end
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end
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endmodule
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endmodule
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