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URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [perl/] [hdr_file_gen.pl] - Diff between revs 38 and 48

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Rev 38 Rev 48
use lib 'lib/perl';
use lib 'lib/perl';
 
 
use strict;
use strict;
use warnings;
use warnings;
 
use FindBin;
 
use lib $FindBin::Bin;
use soc;
use soc;
use ip;
use ip;
 
 
 
 
 
 
##################
##################
#     header file gen
#     header file gen
##################
##################
 
 
 
 
 
 
sub get_instance_global_variable{
sub get_instance_global_variable{
        my ($soc,$id)   = @_;
        my ($soc,$id)   = @_;
        my $module      =$soc->soc_get_module($id);
        my $module      =$soc->soc_get_module($id);
        my $module_name =$soc->soc_get_module_name($id);
        my $module_name =$soc->soc_get_module_name($id);
        my $category    =$soc->soc_get_category($id);
        my $category    =$soc->soc_get_category($id);
        my $inst        =$soc->soc_get_instance_name($id);
        my $inst        =$soc->soc_get_instance_name($id);
        my @plugs= $soc->soc_get_all_plugs_of_an_instance($id);
        my @plugs= $soc->soc_get_all_plugs_of_an_instance($id);
        my %params= $soc->soc_get_module_param($id);
        my %params= $soc->soc_get_module_param($id);
        #add two extra variable the instance name and base addresses
        #add two extra variable the instance name and base addresses
        my $core_id= $soc->object_get_attribute('global_param','CORE_ID');
        my $core_id= $soc->object_get_attribute('global_param','CORE_ID');
        $params{CORE_ID}=(defined $core_id)? $core_id: 0;
        $params{CORE_ID}=(defined $core_id)? $core_id: 0;
        $params{IP}=$inst;
        $params{IP}=$inst;
        $params{CORE}=$id;
        $params{CORE}=$id;
        foreach my $plug (@plugs){
        foreach my $plug (@plugs){
                my @nums=$soc->soc_list_plug_nums($id,$plug);
                my @nums=$soc->soc_list_plug_nums($id,$plug);
                foreach my $num (@nums){
                foreach my $num (@nums){
                        my ($addr,$base,$end,$name,$connect_id,$connect_socket,$connect_socket_num)=$soc->soc_get_plug($id,$plug,$num);
                        my ($addr,$base,$end,$name,$connect_id,$connect_socket,$connect_socket_num)=$soc->soc_get_plug($id,$plug,$num);
                        #wishbone slave address
                        #wishbone slave address
                        if((defined $connect_socket) && ($connect_socket eq 'wb_slave')){
                        if((defined $connect_socket) && ($connect_socket eq 'wb_slave')){
                                #print "$addr,$base,$end,$connect_id,$connect_socket,$connect_socket_num\n";
                                #print "$addr,$base,$end,$connect_id,$connect_socket,$connect_socket_num\n";
                                my $base_hex=sprintf("0X%08x", $base);
                                my $base_hex=sprintf("0X%08x", $base);
                                my $end_hex=sprintf("0X%08x", $end);
                                my $end_hex=sprintf("0X%08x", $end);
                                my $val="BASE".$num;
                                my $val="BASE".$num;
                                $params{$val}=$base_hex;
                                $params{$val}=$base_hex;
 
 
                        }
                        }
 
 
 
 
                }
                }
        }
        }
        $params{BASE}=$params{BASE0} if(defined $params{BASE0});
        $params{BASE}=$params{BASE0} if(defined $params{BASE0});
 
 
 
 
        return (\%params);
        return (\%params);
}
}
 
 
 
 
sub replace_golb_var{
sub replace_golb_var{
        my ($hdr,$ref)=@_;
        my ($hdr,$ref)=@_;
        my %params= %{$ref};
        my %params= %{$ref};
        foreach my $p (sort keys %params){
        foreach my $p (sort keys %params){
                my $pattern=  '\$\{?' . $p . '(\}|\b)';
                my $pattern=  '\$\{?' . $p . '(\}|\b)';
                ($hdr=$hdr)=~s/$pattern/$params{$p}/g;
                ($hdr=$hdr)=~s/$pattern/$params{$p}/g;
        }
        }
        return $hdr;
        return $hdr;
 
 
}
}
 
 
 
 
 
 
sub generate_header_file{
sub generate_header_file{
        my ($soc,$project_dir,$sw_path,$hw_path,$dir)= @_;
        my ($soc,$project_dir,$sw_path,$hw_path,$dir)= @_;
        my $soc_name=$soc->object_get_attribute('soc_name');
        my $soc_name=$soc->object_get_attribute('soc_name');
        $soc_name = uc($soc_name);
        $soc_name = uc($soc_name);
        if(!defined $soc_name){$soc_name='soc'};
        if(!defined $soc_name){$soc_name='soc'};
 
 
 
        my $name=$soc->object_get_attribute('soc_name');
 
 
        my @instances=$soc->soc_get_all_instances();
        my @instances=$soc->soc_get_all_instances();
        my $system_h="#ifndef $soc_name\_SYSTEM_H\n\t#define $soc_name\_SYSTEM_H\n";
        my $system_h="#ifndef $soc_name\_SYSTEM_H\n\t#define $soc_name\_SYSTEM_H\n";
 
        my $system_c="#include \"$name.h\"\n\n";
 
 
        #add_text_to_string(\$system_h, "\n #include <stdio.h> \n #include <stdlib.h> \n #include \"aemb/core.hh\"");
        #add_text_to_string(\$system_h, "\n #include <stdio.h> \n #include <stdlib.h> \n #include \"aemb/core.hh\"");
 
 
 
 
        my $ip = ip->lib_new ();
        my $ip = ip->lib_new ();
 
 
 
 
        foreach my $id (@instances){
        foreach my $id (@instances){
                my $module              =$soc->soc_get_module($id);
                my $module              =$soc->soc_get_module($id);
                my $module_name =$soc->soc_get_module_name($id);
                my $module_name =$soc->soc_get_module_name($id);
                my $category    =$soc->soc_get_category($id);
                my $category    =$soc->soc_get_category($id);
                my $inst                =$soc->soc_get_instance_name($id);
                my $inst                =$soc->soc_get_instance_name($id);
 
 
                add_text_to_string(\$system_h,"\n \n /*  $inst   */ \n");
                add_text_to_string(\$system_h,"\n \n /*  $inst   */ \n");
 
                $system_c = $system_c . "\n \n /*  $inst   */ \n";
 
 
                #$inst=uc($inst);
                #$inst=uc($inst);
                # print base address
                # print base address
                my @plugs= $soc->soc_get_all_plugs_of_an_instance($id);
                my @plugs= $soc->soc_get_all_plugs_of_an_instance($id);
 
 
 
 
                my %params= %{get_instance_global_variable($soc,$id)};
                my %params= %{get_instance_global_variable($soc,$id)};
 
 
 
 
                foreach my $plug (@plugs){
                foreach my $plug (@plugs){
                        my @nums=$soc->soc_list_plug_nums($id,$plug);
                        my @nums=$soc->soc_list_plug_nums($id,$plug);
                        foreach my $num (@nums){
                        foreach my $num (@nums){
                                my ($addr,$base,$end,$name,$connect_id,$connect_socket,$connect_socket_num)=$soc->soc_get_plug($id,$plug,$num);
                                my ($addr,$base,$end,$name,$connect_id,$connect_socket,$connect_socket_num)=$soc->soc_get_plug($id,$plug,$num);
                                        #intrrupt 
                                        #intrrupt 
                                        if((defined $connect_socket) && ($connect_socket eq 'interrupt_peripheral')){
                                        if((defined $connect_socket) && ($connect_socket eq 'interrupt_peripheral')){
                                                add_text_to_string(\$system_h,"//intrrupt flag location\n");
                                                add_text_to_string(\$system_h,"//intrrupt flag location\n");
                                                add_text_to_string(\$system_h," #define $inst\_INT (1<<$connect_socket_num)\n") if(scalar (@nums)==1);
                                                add_text_to_string(\$system_h," #define $inst\_INT (1<<$connect_socket_num)\n") if(scalar (@nums)==1);
                                                add_text_to_string(\$system_h," #define $inst\_$num\_INT    (1<<$connect_socket_num)\n") if(scalar (@nums)>1);
                                                add_text_to_string(\$system_h," #define $inst\_$num\_INT    (1<<$connect_socket_num)\n") if(scalar (@nums)>1);
 
                                                add_text_to_string(\$system_h," #define $inst\_INT_PIN $connect_socket_num\n") if(scalar (@nums)==1);
 
                                                add_text_to_string(\$system_h," #define $inst\_$num\_INT_PIN    $connect_socket_num\n") if(scalar (@nums)>1);
                                        }
                                        }
 
 
                        }
                        }
                }
                }
 
 
 
 
                my $hdr                 =$ip->ip_get($category,$module,"system_h");
                my $hdr_h=$ip->ip_get($category,$module,"system_h");
                #print "$hdr";
                if(defined $hdr_h){
 
                        $hdr_h=replace_golb_var($hdr_h,\%params);
 
                        add_text_to_string(\$system_h,"$hdr_h\n");
 
                }
 
 
 
 
                #   \$\{?IP(\b|\})
                my $hdr_c=$ip->ip_get($category,$module,"system_c");
                if(defined $hdr){
                if(defined $hdr_c){
                        $hdr=replace_golb_var($hdr,\%params);
                        $hdr_c=replace_golb_var($hdr_c,\%params);
                        add_text_to_string(\$system_h,"$hdr\n");
                        $system_c=$system_c."$hdr_c\n";
                }
                }
 
 
 
 
                # Write Software gen files
                # Write Software gen files
                my @sw_file_gen = $ip->ip_get_list($category,$module,"gen_sw_files");
                my @sw_file_gen = $ip->ip_get_list($category,$module,"gen_sw_files");
                foreach my $file (@sw_file_gen){
                foreach my $file (@sw_file_gen){
                        if(defined $file ){
                        if(defined $file ){
                                my ($path,$rename)=split('frename_sep_t',$file);
                                my ($path,$rename)=split('frename_sep_t',$file);
                                $rename=replace_golb_var($rename,\%params);
                                $rename=replace_golb_var($rename,\%params);
                                #read the file content
                                #read the file content
                                my $content=read_file_cntent($path,$project_dir);
                                my $content=read_file_cntent($path,$project_dir);
                                $content=replace_golb_var($content,\%params);
                                $content=replace_golb_var($content,\%params);
 
 
 
 
                                if(defined $rename){
                                if(defined $rename){
 
                                        open(FILE,  ">$sw_path/$rename") || die "Can not open: $!";
                                        open(FILE,  ">lib/verilog/tmp") || die "Can not open: $!";
 
                                        print FILE $content;
                                        print FILE $content;
                                        close(FILE) || die "Error closing file: $!";
                                        close(FILE) || die "Error closing file: $!";
                                        move ("$dir/lib/verilog/tmp","$sw_path/$rename");
 
 
 
 
 
                                }
                                }
                        }
                        }
                }
                }
 
 
                # Write Hardware gen files
                # Write Hardware gen files
                my @hw_file_gen = $ip->ip_get_list($category,$module,"gen_hw_files");
                my @hw_file_gen = $ip->ip_get_list($category,$module,"gen_hw_files");
                foreach my $file (@hw_file_gen){
                foreach my $file (@hw_file_gen){
                        if(defined $file ){
                        if(defined $file ){
                                my ($path,$rename)=split('frename_sep_t',$file);
                                my ($path,$rename)=split('frename_sep_t',$file);
                                $rename=replace_golb_var($rename,\%params);
                                $rename=replace_golb_var($rename,\%params);
                                #read the file content
                                #read the file content
                                my $content=read_file_cntent($path,$project_dir);
                                my $content=read_file_cntent($path,$project_dir);
                                $content=replace_golb_var($content,\%params);
                                $content=replace_golb_var($content,\%params);
 
 
 
 
                                if(defined $rename){
                                if(defined $rename){
 
                                        open(FILE,  ">$hw_path/$rename") || die "Can not open: $!";
                                        open(FILE,  ">lib/verilog/tmp") || die "Can not open: $!";
 
                                        print FILE $content;
                                        print FILE $content;
                                        close(FILE) || die "Error closing file: $!";
                                        close(FILE) || die "Error closing file: $!";
                                        move ("$dir/lib/verilog/tmp","$hw_path/$rename");
 
 
 
 
 
                                }
                                }
                        }
                        }
                }
                }
 
 
 
 
 
 
        }
        }
 
 
        add_text_to_string(\$system_h,"#endif\n");
        add_text_to_string(\$system_h,"#endif\n");
        my $name=$soc->object_get_attribute('soc_name');
 
        open(FILE,  ">lib/verilog/$name.h") || die "Can not open: $!";
        #write sytem.h file
 
        open(FILE,  ">$sw_path/$name.h") || die "Can not open: $!";
                        print FILE $system_h;
                        print FILE $system_h;
                        close(FILE) || die "Error closing file: $!";
                        close(FILE) || die "Error closing file: $!";
                        move ("$dir/lib/verilog/$name.h","$sw_path/");
 
 
        #write system.c file
 
        open(FILE,  ">$sw_path/$name.c") || die "Can not open: $!";
 
        print FILE $system_c;
 
        close(FILE) || die "Error closing file: $!";
 
 
 
 
 
 
 
 
 
 
}
}
 
 
 
 
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