#!/bin/sh
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#!/bin/sh
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script_path=$(pwd)
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script_path=$(pwd)
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path=$script_path/..
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path=$script_path/..
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src_noc_path=$path/src_noc
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src_noc_path=$path/src_noc
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src_modelsim_path=$path/src_modelsim
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src_modelsim_path=$path/src_modelsim
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src_verilator_path=$path/src_verilator
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src_verilator_path=$path/src_verilator
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comp_path=$path/../mpsoc_work/verilator
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comp_path=$path/../mpsoc_work/verilator
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work_path=$comp_path/work
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work_path=$comp_path/work
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mkdir -p $work_path/rtl_work
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mkdir -p $work_path/rtl_work
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cp split $work_path/split
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cp split $work_path/split
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cd $work_path
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cd $work_path
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# remove old files
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# remove old files
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rm -rf rtl_work/*
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rm -rf rtl_work/*
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rm -rf processed_rtl/*
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rm -rf processed_rtl/*
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rm -rf processed_rtl/obj_dir/*
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rm -rf processed_rtl/obj_dir/*
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echo "copy all verilog files in rtl_work folder"
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echo "copy all verilog files in rtl_work folder"
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find $src_noc_path -name \*.v -exec cp '{}' rtl_work/ \;
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find $src_noc_path -name \*.v -exec cp '{}' rtl_work/ \;
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find $src_verilator_path -name \*.v -exec cp '{}' rtl_work/ \;
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find $src_verilator_path -name \*.v -exec cp '{}' rtl_work/ \;
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echo "split all verilog modules in separate files"
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echo "split all verilog modules in separate files"
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./split > foo
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./split > foo
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find $src_verilator_path -name \*.sv -exec cp '{}' processed_rtl/ \;
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find $src_verilator_path -name \*.sv -exec cp '{}' processed_rtl/ \;
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cd processed_rtl
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cd processed_rtl
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verilator --cc router_verilator.v --profile-cfuncs --prefix "Vrouter" -O3
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verilator --cc router_verilator.v --profile-cfuncs --prefix "Vrouter" -O3 -CFLAGS -O3
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verilator --cc noc_connection.sv --prefix "Vnoc" -O3
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verilator --cc noc_connection.sv --prefix "Vnoc" -O3 -CFLAGS -O3
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verilator --cc --profile-cfuncs traffic_gen_verilator.v --prefix "Vtraffic" -O3
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verilator --cc --profile-cfuncs traffic_gen_verilator.v --prefix "Vtraffic" -O3 -CFLAGS -O3
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cp $script_path/Makefile obj_dir/
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cp $script_path/Makefile obj_dir/
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cd obj_dir
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cd obj_dir
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make lib
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make lib
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