/*
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/*
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* Copyright (c) 2014, Aleksander Osman
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* Copyright (c) 2014, Aleksander Osman
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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*
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*
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* * Redistributions of source code must retain the above copyright notice, this
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* * Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* list of conditions and the following disclaimer.
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*
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*
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* * Redistributions in binary form must reproduce the above copyright notice,
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* * Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* and/or other materials provided with the distribution.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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*/
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#include <stdio.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <stdarg.h>
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#include <string.h>
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#include <string.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <io.h>
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#include <io.h>
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#include <sys/alt_irq.h>
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#include <sys/alt_irq.h>
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#include <system.h>
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#include <system.h>
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typedef unsigned char uint8;
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typedef unsigned char uint8;
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typedef unsigned short uint16;
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typedef unsigned short uint16;
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typedef unsigned int uint32;
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typedef unsigned int uint32;
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void osd_enable(bool enable) {
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void osd_enable(bool enable) {
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IOWR(VGA_BASE, 0, 0x8000 | ((enable)? 0x4000 : 0x0000));
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IOWR(VGA_BASE, 0, 0x8000 | ((enable)? 0x4000 : 0x0000));
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}
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}
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void osd_print(int position, bool invert, const char *format, ...) {
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void osd_print(int position, bool invert, const char *format, ...) {
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va_list ap;
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va_list ap;
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va_start(ap, format);
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va_start(ap, format);
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char buf[64];
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char buf[64];
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memset((void *)buf, 0, (unsigned long int)sizeof(buf));
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memset((void *)buf, 0, (unsigned long int)sizeof(buf));
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int written = vsnprintf(buf, sizeof(buf), format, ap);
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int written = vsnprintf(buf, sizeof(buf), format, ap);
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va_end(ap);
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va_end(ap);
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for(int i=0; i<written; i++) IOWR(VGA_BASE, position+i, buf[i] | ((invert)? 0x100 : 0x000));
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for(int i=0; i<written; i++) IOWR(VGA_BASE, position+i, buf[i] | ((invert)? 0x100 : 0x000));
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}
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}
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int read_byte_if_possible() {
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int read_byte_if_possible() {
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uint32 rd = IORD(JTAG_UART_BASE, 0);
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uint32 rd = IORD(JTAG_UART_BASE, 0);
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if((rd >> 15) & 1) return rd & 0xFF;
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if((rd >> 15) & 1) return rd & 0xFF;
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return -1;
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return -1;
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}
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}
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inline uint8 read_byte() {
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inline uint8 read_byte() {
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while(true) {
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while(true) {
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unsigned int rd = IORD(JTAG_UART_BASE, 0);
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unsigned int rd = IORD(JTAG_UART_BASE, 0);
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if((rd >> 15) & 1) return rd & 0xFF;
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if((rd >> 15) & 1) return rd & 0xFF;
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}
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}
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}
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}
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uint32 read_int() {
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uint32 read_int() {
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uint32 rd = 0;
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uint32 rd = 0;
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rd |= read_byte() << 0;
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rd |= read_byte() << 0;
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rd |= read_byte() << 8;
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rd |= read_byte() << 8;
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rd |= read_byte() << 16;
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rd |= read_byte() << 16;
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rd |= read_byte() << 24;
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rd |= read_byte() << 24;
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return rd;
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return rd;
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}
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}
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void crc32(uint8 *ptr, uint32 *crc_output) {
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void crc32(uint8 *ptr, uint32 *crc_output) {
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static uint8 crc[32];
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static uint8 crc[32];
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//do nothing
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//do nothing
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if(ptr != NULL && crc_output != NULL) return;
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if(ptr != NULL && crc_output != NULL) return;
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//initialize
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//initialize
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if(ptr == NULL && crc_output == NULL) {
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if(ptr == NULL && crc_output == NULL) {
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for(int i=0; i<32; i++) crc[i] = 1;
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for(int i=0; i<32; i++) crc[i] = 1;
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return;
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return;
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}
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}
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//output
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//output
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if(ptr == NULL && crc_output != NULL) {
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if(ptr == NULL && crc_output != NULL) {
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*crc_output = 0;
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*crc_output = 0;
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for(int i=0; i<32; i++) {
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for(int i=0; i<32; i++) {
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(*crc_output) |= crc[i] << (31-i);
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(*crc_output) |= crc[i] << (31-i);
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}
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}
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(*crc_output) = ~(*crc_output);
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(*crc_output) = ~(*crc_output);
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return;
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return;
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}
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}
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uint8 in[8];
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uint8 in[8];
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for(int j=0; j<8; j++) in[j] = ((*ptr) >> j) & 1;
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for(int j=0; j<8; j++) in[j] = ((*ptr) >> j) & 1;
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uint8 new_crc[32];
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uint8 new_crc[32];
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new_crc[31] = in[2] ^ crc[23] ^ crc[29];
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new_crc[31] = in[2] ^ crc[23] ^ crc[29];
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new_crc[30] = in[0] ^ in[3] ^ crc[22] ^ crc[28] ^ crc[31];
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new_crc[30] = in[0] ^ in[3] ^ crc[22] ^ crc[28] ^ crc[31];
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new_crc[29] = in[0] ^ in[1] ^ in[4] ^ crc[21] ^ crc[27] ^ crc[30] ^ crc[31];
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new_crc[29] = in[0] ^ in[1] ^ in[4] ^ crc[21] ^ crc[27] ^ crc[30] ^ crc[31];
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new_crc[28] = in[1] ^ in[2] ^ in[5] ^ crc[20] ^ crc[26] ^ crc[29] ^ crc[30];
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new_crc[28] = in[1] ^ in[2] ^ in[5] ^ crc[20] ^ crc[26] ^ crc[29] ^ crc[30];
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new_crc[27] = in[0] ^ in[2] ^ in[3] ^ in[6] ^ crc[19] ^ crc[25] ^ crc[28] ^ crc[29] ^ crc[31];
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new_crc[27] = in[0] ^ in[2] ^ in[3] ^ in[6] ^ crc[19] ^ crc[25] ^ crc[28] ^ crc[29] ^ crc[31];
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new_crc[26] = in[1] ^ in[3] ^ in[4] ^ in[7] ^ crc[18] ^ crc[24] ^ crc[27] ^ crc[28] ^ crc[30];
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new_crc[26] = in[1] ^ in[3] ^ in[4] ^ in[7] ^ crc[18] ^ crc[24] ^ crc[27] ^ crc[28] ^ crc[30];
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new_crc[25] = in[4] ^ in[5] ^ crc[17] ^ crc[26] ^ crc[27];
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new_crc[25] = in[4] ^ in[5] ^ crc[17] ^ crc[26] ^ crc[27];
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new_crc[24] = in[0] ^ in[5] ^ in[6] ^ crc[16] ^ crc[25] ^ crc[26] ^ crc[31];
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new_crc[24] = in[0] ^ in[5] ^ in[6] ^ crc[16] ^ crc[25] ^ crc[26] ^ crc[31];
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new_crc[23] = in[1] ^ in[6] ^ in[7] ^ crc[15] ^ crc[24] ^ crc[25] ^ crc[30];
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new_crc[23] = in[1] ^ in[6] ^ in[7] ^ crc[15] ^ crc[24] ^ crc[25] ^ crc[30];
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new_crc[22] = in[7] ^ crc[14] ^ crc[24];
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new_crc[22] = in[7] ^ crc[14] ^ crc[24];
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new_crc[21] = in[2] ^ crc[13] ^ crc[29];
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new_crc[21] = in[2] ^ crc[13] ^ crc[29];
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new_crc[20] = in[3] ^ crc[12] ^ crc[28];
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new_crc[20] = in[3] ^ crc[12] ^ crc[28];
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new_crc[19] = in[0] ^ in[4] ^ crc[11] ^ crc[27] ^ crc[31];
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new_crc[19] = in[0] ^ in[4] ^ crc[11] ^ crc[27] ^ crc[31];
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new_crc[18] = in[0] ^ in[1] ^ in[5] ^ crc[10] ^ crc[26] ^ crc[30] ^ crc[31];
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new_crc[18] = in[0] ^ in[1] ^ in[5] ^ crc[10] ^ crc[26] ^ crc[30] ^ crc[31];
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new_crc[17] = in[1] ^ in[2] ^ in[6] ^ crc[9] ^ crc[25] ^ crc[29] ^ crc[30];
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new_crc[17] = in[1] ^ in[2] ^ in[6] ^ crc[9] ^ crc[25] ^ crc[29] ^ crc[30];
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new_crc[16] = in[2] ^ in[3] ^ in[7] ^ crc[8] ^ crc[24] ^ crc[28] ^ crc[29];
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new_crc[16] = in[2] ^ in[3] ^ in[7] ^ crc[8] ^ crc[24] ^ crc[28] ^ crc[29];
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new_crc[15] = in[0] ^ in[2] ^ in[3] ^ in[4] ^ crc[7] ^ crc[27] ^ crc[28] ^ crc[29] ^ crc[31];
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new_crc[15] = in[0] ^ in[2] ^ in[3] ^ in[4] ^ crc[7] ^ crc[27] ^ crc[28] ^ crc[29] ^ crc[31];
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new_crc[14] = in[0] ^ in[1] ^ in[3] ^ in[4] ^ in[5] ^ crc[6] ^ crc[26] ^ crc[27] ^ crc[28] ^ crc[30] ^ crc[31];
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new_crc[14] = in[0] ^ in[1] ^ in[3] ^ in[4] ^ in[5] ^ crc[6] ^ crc[26] ^ crc[27] ^ crc[28] ^ crc[30] ^ crc[31];
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new_crc[13] = in[0] ^ in[1] ^ in[2] ^ in[4] ^ in[5] ^ in[6] ^ crc[5] ^ crc[25] ^ crc[26] ^ crc[27] ^ crc[29] ^ crc[30] ^ crc[31];
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new_crc[13] = in[0] ^ in[1] ^ in[2] ^ in[4] ^ in[5] ^ in[6] ^ crc[5] ^ crc[25] ^ crc[26] ^ crc[27] ^ crc[29] ^ crc[30] ^ crc[31];
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new_crc[12] = in[1] ^ in[2] ^ in[3] ^ in[5] ^ in[6] ^ in[7] ^ crc[4] ^ crc[24] ^ crc[25] ^ crc[26] ^ crc[28] ^ crc[29] ^ crc[30];
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new_crc[12] = in[1] ^ in[2] ^ in[3] ^ in[5] ^ in[6] ^ in[7] ^ crc[4] ^ crc[24] ^ crc[25] ^ crc[26] ^ crc[28] ^ crc[29] ^ crc[30];
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new_crc[11] = in[3] ^ in[4] ^ in[6] ^ in[7] ^ crc[3] ^ crc[24] ^ crc[25] ^ crc[27] ^ crc[28];
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new_crc[11] = in[3] ^ in[4] ^ in[6] ^ in[7] ^ crc[3] ^ crc[24] ^ crc[25] ^ crc[27] ^ crc[28];
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new_crc[10] = in[2] ^ in[4] ^ in[5] ^ in[7] ^ crc[2] ^ crc[24] ^ crc[26] ^ crc[27] ^ crc[29];
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new_crc[10] = in[2] ^ in[4] ^ in[5] ^ in[7] ^ crc[2] ^ crc[24] ^ crc[26] ^ crc[27] ^ crc[29];
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new_crc[9] = in[2] ^ in[3] ^ in[5] ^ in[6] ^ crc[1] ^ crc[25] ^ crc[26] ^ crc[28] ^ crc[29];
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new_crc[9] = in[2] ^ in[3] ^ in[5] ^ in[6] ^ crc[1] ^ crc[25] ^ crc[26] ^ crc[28] ^ crc[29];
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new_crc[8] = in[3] ^ in[4] ^ in[6] ^ in[7] ^ crc[0] ^ crc[24] ^ crc[25] ^ crc[27] ^ crc[28];
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new_crc[8] = in[3] ^ in[4] ^ in[6] ^ in[7] ^ crc[0] ^ crc[24] ^ crc[25] ^ crc[27] ^ crc[28];
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new_crc[7] = in[0] ^ in[2] ^ in[4] ^ in[5] ^ in[7] ^ crc[24] ^ crc[26] ^ crc[27] ^ crc[29] ^ crc[31];
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new_crc[7] = in[0] ^ in[2] ^ in[4] ^ in[5] ^ in[7] ^ crc[24] ^ crc[26] ^ crc[27] ^ crc[29] ^ crc[31];
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new_crc[6] = in[0] ^ in[1] ^ in[2] ^ in[3] ^ in[5] ^ in[6] ^ crc[25] ^ crc[26] ^ crc[28] ^ crc[29] ^ crc[30] ^ crc[31];
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new_crc[6] = in[0] ^ in[1] ^ in[2] ^ in[3] ^ in[5] ^ in[6] ^ crc[25] ^ crc[26] ^ crc[28] ^ crc[29] ^ crc[30] ^ crc[31];
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new_crc[5] = in[0] ^ in[1] ^ in[2] ^ in[3] ^ in[4] ^ in[6] ^ in[7] ^ crc[24] ^ crc[25] ^ crc[27] ^ crc[28] ^ crc[29] ^ crc[30] ^ crc[31];
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new_crc[5] = in[0] ^ in[1] ^ in[2] ^ in[3] ^ in[4] ^ in[6] ^ in[7] ^ crc[24] ^ crc[25] ^ crc[27] ^ crc[28] ^ crc[29] ^ crc[30] ^ crc[31];
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new_crc[4] = in[1] ^ in[3] ^ in[4] ^ in[5] ^ in[7] ^ crc[24] ^ crc[26] ^ crc[27] ^ crc[28] ^ crc[30];
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new_crc[4] = in[1] ^ in[3] ^ in[4] ^ in[5] ^ in[7] ^ crc[24] ^ crc[26] ^ crc[27] ^ crc[28] ^ crc[30];
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new_crc[3] = in[0] ^ in[4] ^ in[5] ^ in[6] ^ crc[25] ^ crc[26] ^ crc[27] ^ crc[31];
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new_crc[3] = in[0] ^ in[4] ^ in[5] ^ in[6] ^ crc[25] ^ crc[26] ^ crc[27] ^ crc[31];
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new_crc[2] = in[0] ^ in[1] ^ in[5] ^ in[6] ^ in[7] ^ crc[24] ^ crc[25] ^ crc[26] ^ crc[30] ^ crc[31];
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new_crc[2] = in[0] ^ in[1] ^ in[5] ^ in[6] ^ in[7] ^ crc[24] ^ crc[25] ^ crc[26] ^ crc[30] ^ crc[31];
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new_crc[1] = in[0] ^ in[1] ^ in[6] ^ in[7] ^ crc[24] ^ crc[25] ^ crc[30] ^ crc[31];
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new_crc[1] = in[0] ^ in[1] ^ in[6] ^ in[7] ^ crc[24] ^ crc[25] ^ crc[30] ^ crc[31];
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new_crc[0] = in[1] ^ in[7] ^ crc[24] ^ crc[30];
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new_crc[0] = in[1] ^ in[7] ^ crc[24] ^ crc[30];
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memcpy(crc, new_crc, sizeof(crc));
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memcpy(crc, new_crc, sizeof(crc));
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}
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}
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#pragma pack(push)
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#pragma pack(push)
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#pragma pack(1)
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#pragma pack(1)
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struct entry_t {
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struct entry_t {
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uint8 type;
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uint8 type;
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uint8 name[15];
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uint8 name[15];
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union args_t {
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union args_t {
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struct bios_t {
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struct bios_t {
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uint32 sector;
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uint32 sector;
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uint32 size_in_bytes;
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uint32 size_in_bytes;
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uint32 destination;
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uint32 destination;
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uint32 crc32;
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uint32 crc32;
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} bios;
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} bios;
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struct hdd_t {
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struct hdd_t {
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uint32 sector;
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uint32 sector;
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uint32 cyliders;
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uint32 cyliders;
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uint32 heads;
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uint32 heads;
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uint32 spt;
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uint32 spt;
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} hdd;
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} hdd;
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struct floppy_t {
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struct floppy_t {
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uint32 sector;
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uint32 sector;
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} floppy;
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} floppy;
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struct end_of_list_t {
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struct end_of_list_t {
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uint32 crc32;
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uint32 crc32;
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} end_of_list;
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} end_of_list;
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} args;
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} args;
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};
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};
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#pragma pack(pop)
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#pragma pack(pop)
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#define ENTRIES_COUNT 128
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#define ENTRIES_COUNT 128
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struct entry_t entries[ENTRIES_COUNT];
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struct entry_t entries[ENTRIES_COUNT];
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#define TYPE_BIOS 1
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#define TYPE_BIOS 1
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#define TYPE_VGABIOS 2
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#define TYPE_VGABIOS 2
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#define TYPE_HDD 3
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#define TYPE_HDD 3
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#define TYPE_FD_1_44M 16
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#define TYPE_FD_1_44M 16
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#define TYPE_CRC32 127
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#define TYPE_CRC32 127
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#define ENTRY_ABORT -500
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#define ENTRY_ABORT -500
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int show_menu(uint8 mask, uint8 value, bool abortable) {
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int show_menu(uint8 mask, uint8 value, bool abortable) {
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int index_start = -1;
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int index_start = -1;
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for(int i=0; i<ENTRIES_COUNT; i++) {
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for(int i=0; i<ENTRIES_COUNT; i++) {
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if((entries[i].type & mask) == value) {
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if((entries[i].type & mask) == value) {
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index_start = i;
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index_start = i;
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break;
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break;
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}
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}
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}
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}
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if(index_start == -1) {
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if(index_start == -1) {
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osd_print(9*16+0, true, "Index start err ");
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osd_print(9*16+0, true, "Index start err ");
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return -1;
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return -1;
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}
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}
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int index_end = -1;
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int index_end = -1;
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for(int i=ENTRIES_COUNT-1; i>=0; i--) {
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for(int i=ENTRIES_COUNT-1; i>=0; i--) {
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if((entries[i].type & mask) == value) {
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if((entries[i].type & mask) == value) {
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index_end = i;
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index_end = i;
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break;
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break;
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}
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}
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}
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}
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if(index_start == -1) {
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if(index_start == -1) {
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osd_print(9*16+0, true, "Index end error ");
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osd_print(9*16+0, true, "Index end error ");
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return -2;
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return -2;
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}
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}
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int index_size = index_end - index_start;
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int index_size = index_end - index_start;
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int index = 0;
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int index = 0;
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bool zero_delay_last = true;
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bool zero_delay_last = true;
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while(true) {
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while(true) {
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//print contents
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//print contents
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for(int i=-5; i<7; i++) {
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for(int i=-5; i<7; i++) {
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if((index + i < 0) || (index + i > index_size)) {
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if((index + i < 0) || (index + i > index_size)) {
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osd_print((9+i)*16, false, " ");
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osd_print((9+i)*16, false, " ");
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}
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}
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else {
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else {
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int current_index = index_start + index + i;
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int current_index = index_start + index + i;
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bool invert = i == 0;
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bool invert = i == 0;
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osd_print((9+i)*16, invert, " ");
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osd_print((9+i)*16, invert, " ");
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osd_print((9+i)*16, invert, " %s", entries[current_index].name);
|
osd_print((9+i)*16, invert, " %s", entries[current_index].name);
|
}
|
}
|
}
|
}
|
|
|
char key = 0;
|
char key = 0;
|
bool zero_delay = true;
|
bool zero_delay = true;
|
while(key == 0) {
|
while(key == 0) {
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
|
|
if((keys & 0x1) == 0) key = 'v';
|
if((keys & 0x1) == 0) key = 'v';
|
else if((keys & 0x2) == 0) key = '^';
|
else if((keys & 0x2) == 0) key = '^';
|
else if((keys & 0x4) == 0) key = 'Y';
|
else if((keys & 0x4) == 0) key = 'Y';
|
else if((keys & 0x8) == 0) key = 'N';
|
else if((keys & 0x8) == 0) key = 'N';
|
else key = 0;
|
else key = 0;
|
|
|
if(key == 0) zero_delay = false;
|
if(key == 0) zero_delay = false;
|
}
|
}
|
|
|
if(key == 'Y') return index_start + index;
|
if(key == 'Y') return index_start + index;
|
if(key == 'N' && abortable) return ENTRY_ABORT;
|
if(key == 'N' && abortable) return ENTRY_ABORT;
|
|
|
if(key == '^' && index > 0) index--;
|
if(key == '^' && index > 0) index--;
|
if(key == 'v' && index < index_size) index++;
|
if(key == 'v' && index < index_size) index++;
|
|
|
if(zero_delay_last && zero_delay) usleep(100000);
|
if(zero_delay_last && zero_delay) usleep(100000);
|
else usleep(300000);
|
else usleep(300000);
|
|
|
zero_delay_last = zero_delay;
|
zero_delay_last = zero_delay;
|
}
|
}
|
}
|
}
|
|
|
int select_and_load_bios(uint8 type, uint32 position,
|
int select_and_load_bios(uint8 type, uint32 position,
|
const char *select_txt, const char *load_txt, const char *verify_txt, const char *verify_failed_txt, const char *verify_ok_txt)
|
const char *select_txt, const char *load_txt, const char *verify_txt, const char *verify_failed_txt, const char *verify_ok_txt)
|
{
|
{
|
osd_print(3*16+0, false, select_txt);
|
osd_print(3*16+0, false, select_txt);
|
|
|
int menu_result = show_menu(0xFF, type, false);
|
int menu_result = show_menu(0xFF, type, false);
|
if(menu_result < 0) return menu_result;
|
if(menu_result < 0) return menu_result;
|
|
|
for(int i=48; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
for(int i=48; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
|
|
//load bios
|
//load bios
|
osd_print(16*position, false, load_txt);
|
osd_print(16*position, false, load_txt);
|
|
|
uint8 *dst_ptr = (uint8 *)entries[menu_result].args.bios.destination;
|
uint8 *dst_ptr = (uint8 *)entries[menu_result].args.bios.destination;
|
uint32 size_in_bytes = entries[menu_result].args.bios.size_in_bytes;
|
uint32 size_in_bytes = entries[menu_result].args.bios.size_in_bytes;
|
uint32 sector = entries[menu_result].args.bios.sector;
|
uint32 sector = entries[menu_result].args.bios.sector;
|
|
|
uint8 sector_buf[4096];
|
uint8 sector_buf[4096];
|
while(size_in_bytes > 0) {
|
while(size_in_bytes > 0) {
|
IOWR(DRIVER_SD_BASE, 0, (int)sector_buf); //Avalon address base
|
IOWR(DRIVER_SD_BASE, 0, (int)sector_buf); //Avalon address base
|
IOWR(DRIVER_SD_BASE, 1, sector); //SD sector
|
IOWR(DRIVER_SD_BASE, 1, sector); //SD sector
|
IOWR(DRIVER_SD_BASE, 2, 8); //sector count
|
IOWR(DRIVER_SD_BASE, 2, 8); //sector count
|
IOWR(DRIVER_SD_BASE, 3, 2); //control READ
|
IOWR(DRIVER_SD_BASE, 3, 2); //control READ
|
|
|
//wait for ready
|
//wait for ready
|
int sd_status = -1;
|
int sd_status = -1;
|
while(sd_status != 2) {
|
while(sd_status != 2) {
|
usleep(100000);
|
usleep(100000);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
}
|
}
|
|
|
uint32 current_size = (size_in_bytes > 4096)? 4096 : size_in_bytes;
|
uint32 current_size = (size_in_bytes > 4096)? 4096 : size_in_bytes;
|
memcpy(dst_ptr, sector_buf, current_size);
|
memcpy(dst_ptr, sector_buf, current_size);
|
|
|
dst_ptr += current_size;
|
dst_ptr += current_size;
|
size_in_bytes -= current_size;
|
size_in_bytes -= current_size;
|
sector += 8;
|
sector += 8;
|
}
|
}
|
|
|
/* //currently disable crc32 verification
|
/* //currently disable crc32 verification
|
osd_print(16*position, false, verify_txt);
|
osd_print(16*position, false, verify_txt);
|
|
|
dst_ptr = (uint8 *)entries[menu_result].args.bios.destination;
|
dst_ptr = (uint8 *)entries[menu_result].args.bios.destination;
|
size_in_bytes = entries[menu_result].args.bios.size_in_bytes;
|
size_in_bytes = entries[menu_result].args.bios.size_in_bytes;
|
|
|
crc32(NULL, NULL);
|
crc32(NULL, NULL);
|
for(uint32 i=0; i<size_in_bytes; i++) {
|
for(uint32 i=0; i<size_in_bytes; i++) {
|
crc32(dst_ptr+i, NULL);
|
crc32(dst_ptr+i, NULL);
|
}
|
}
|
|
|
uint32 crc_calculated = 0;
|
uint32 crc_calculated = 0;
|
crc32(NULL, &crc_calculated);
|
crc32(NULL, &crc_calculated);
|
|
|
if(crc_calculated != entries[menu_result].args.bios.crc32) {
|
if(crc_calculated != entries[menu_result].args.bios.crc32) {
|
osd_print(16*position, false, verify_failed_txt);
|
osd_print(16*position, false, verify_failed_txt);
|
return -1;
|
return -1;
|
}
|
}
|
*/
|
*/
|
osd_print(16*position, false, verify_ok_txt);
|
osd_print(16*position, false, verify_ok_txt);
|
return 0;
|
return 0;
|
}
|
}
|
|
|
|
|
int floppy_index = -1;
|
int floppy_index = -1;
|
int hdd_index = -1;
|
int hdd_index = -1;
|
|
|
bool floppy_is_160k = false;
|
bool floppy_is_160k = false;
|
bool floppy_is_180k = false;
|
bool floppy_is_180k = false;
|
bool floppy_is_320k = false;
|
bool floppy_is_320k = false;
|
bool floppy_is_360k = false;
|
bool floppy_is_360k = false;
|
bool floppy_is_720k = false;
|
bool floppy_is_720k = false;
|
bool floppy_is_1_2m = false;
|
bool floppy_is_1_2m = false;
|
bool floppy_is_1_44m= true;
|
bool floppy_is_1_44m= true;
|
bool floppy_is_2_88m= false;
|
bool floppy_is_2_88m= false;
|
|
|
bool floppy_writeprotect = true;
|
bool floppy_writeprotect = true;
|
|
|
void runtime_menu_no_floppy() {
|
void runtime_menu_no_floppy() {
|
osd_print(16*1, false, "No floppy");
|
osd_print(16*1, false, "No floppy");
|
|
|
osd_print(16*9, false, "Insert floppy");
|
osd_print(16*9, false, "Insert floppy");
|
for(int i=0; i<16; i++) IOWR(VGA_BASE, 16*9+i, 0x100 | (IORD(VGA_BASE, 16*9+i) & 0xFF));
|
for(int i=0; i<16; i++) IOWR(VGA_BASE, 16*9+i, 0x100 | (IORD(VGA_BASE, 16*9+i) & 0xFF));
|
|
|
bool zero_delay_last = true;
|
bool zero_delay_last = true;
|
while(true) {
|
while(true) {
|
char key = 0;
|
char key = 0;
|
bool zero_delay = true;
|
bool zero_delay = true;
|
while(key == 0) {
|
while(key == 0) {
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
|
|
if((keys & 0x1) == 0) key = 'v';
|
if((keys & 0x1) == 0) key = 'v';
|
else if((keys & 0x2) == 0) key = '^';
|
else if((keys & 0x2) == 0) key = '^';
|
else if((keys & 0x4) == 0) key = 'Y';
|
else if((keys & 0x4) == 0) key = 'Y';
|
else if((keys & 0x8) == 0) key = 'N';
|
else if((keys & 0x8) == 0) key = 'N';
|
else key = 0;
|
else key = 0;
|
|
|
if(key == 0) zero_delay = false;
|
if(key == 0) zero_delay = false;
|
}
|
}
|
|
|
if(key == 'Y') {
|
if(key == 'Y') {
|
//wait for key release
|
//wait for key release
|
while((IORD(PIO_INPUT_BASE, 0) & 0xF) != 0xF) { ; }
|
while((IORD(PIO_INPUT_BASE, 0) & 0xF) != 0xF) { ; }
|
|
|
int menu_result = show_menu(0xF0, TYPE_FD_1_44M, true);
|
int menu_result = show_menu(0xF0, TYPE_FD_1_44M, true);
|
if(menu_result == ENTRY_ABORT) {
|
if(menu_result == ENTRY_ABORT) {
|
return;
|
return;
|
}
|
}
|
else if(menu_result < 0) {
|
else if(menu_result < 0) {
|
usleep(2000000);
|
usleep(2000000);
|
return;
|
return;
|
}
|
}
|
|
|
floppy_index = menu_result;
|
floppy_index = menu_result;
|
|
|
floppy_writeprotect = true;
|
floppy_writeprotect = true;
|
|
|
int floppy_sd_base = entries[floppy_index].args.floppy.sector;
|
int floppy_sd_base = entries[floppy_index].args.floppy.sector;
|
|
|
int floppy_media =
|
int floppy_media =
|
(floppy_index < 0)? 0x20 :
|
(floppy_index < 0)? 0x20 :
|
(floppy_is_160k)? 0x00 :
|
(floppy_is_160k)? 0x00 :
|
(floppy_is_180k)? 0x00 :
|
(floppy_is_180k)? 0x00 :
|
(floppy_is_320k)? 0x00 :
|
(floppy_is_320k)? 0x00 :
|
(floppy_is_360k)? 0x00 :
|
(floppy_is_360k)? 0x00 :
|
(floppy_is_720k)? 0xC0 :
|
(floppy_is_720k)? 0xC0 :
|
(floppy_is_1_2m)? 0x00 :
|
(floppy_is_1_2m)? 0x00 :
|
(floppy_is_1_44m)? 0x80 :
|
(floppy_is_1_44m)? 0x80 :
|
(floppy_is_2_88m)? 0x40 :
|
(floppy_is_2_88m)? 0x40 :
|
0x20;
|
0x20;
|
|
|
IOWR(FLOPPY_BASE, 0x0, floppy_index >= 0? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x0, floppy_index >= 0? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x6, floppy_sd_base);
|
IOWR(FLOPPY_BASE, 0x6, floppy_sd_base);
|
IOWR(FLOPPY_BASE, 0xC, floppy_media);
|
IOWR(FLOPPY_BASE, 0xC, floppy_media);
|
|
|
return;
|
return;
|
}
|
}
|
|
|
if(key == 'N') return;
|
if(key == 'N') return;
|
|
|
if(zero_delay_last && zero_delay) usleep(100000);
|
if(zero_delay_last && zero_delay) usleep(100000);
|
else usleep(300000);
|
else usleep(300000);
|
|
|
zero_delay_last = zero_delay;
|
zero_delay_last = zero_delay;
|
}
|
}
|
}
|
}
|
|
|
void runtime_menu_floppy() {
|
void runtime_menu_floppy() {
|
osd_print(16*1, false, "Floppy inserted");
|
osd_print(16*1, false, "Floppy inserted");
|
|
|
int index = 9;
|
int index = 9;
|
|
|
bool zero_delay_last = true;
|
bool zero_delay_last = true;
|
while(true) {
|
while(true) {
|
//draw contents
|
//draw contents
|
for(int i=16*2; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
for(int i=16*2; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
|
|
osd_print(16*index, false, "Eject floppy");
|
osd_print(16*index, false, "Eject floppy");
|
osd_print(16*(index+1), false, floppy_writeprotect? "Clear writeprot" : "Set writeprotect");
|
osd_print(16*(index+1), false, floppy_writeprotect? "Clear writeprot" : "Set writeprotect");
|
for(int i=0; i<16; i++) IOWR(VGA_BASE, 16*9+i, 0x100 | (IORD(VGA_BASE, 16*9+i) & 0xFF));
|
for(int i=0; i<16; i++) IOWR(VGA_BASE, 16*9+i, 0x100 | (IORD(VGA_BASE, 16*9+i) & 0xFF));
|
|
|
char key = 0;
|
char key = 0;
|
bool zero_delay = true;
|
bool zero_delay = true;
|
while(key == 0) {
|
while(key == 0) {
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
|
|
if((keys & 0x1) == 0) key = 'v';
|
if((keys & 0x1) == 0) key = 'v';
|
else if((keys & 0x2) == 0) key = '^';
|
else if((keys & 0x2) == 0) key = '^';
|
else if((keys & 0x4) == 0) key = 'Y';
|
else if((keys & 0x4) == 0) key = 'Y';
|
else if((keys & 0x8) == 0) key = 'N';
|
else if((keys & 0x8) == 0) key = 'N';
|
else key = 0;
|
else key = 0;
|
|
|
if(key == 0) zero_delay = false;
|
if(key == 0) zero_delay = false;
|
}
|
}
|
|
|
if(key == 'Y') {
|
if(key == 'Y') {
|
if(index == 9) { //eject
|
if(index == 9) { //eject
|
floppy_index = -1;
|
floppy_index = -1;
|
|
|
floppy_writeprotect = true;
|
floppy_writeprotect = true;
|
|
|
int floppy_media =
|
int floppy_media =
|
(floppy_index < 0)? 0x20 :
|
(floppy_index < 0)? 0x20 :
|
(floppy_is_160k)? 0x00 :
|
(floppy_is_160k)? 0x00 :
|
(floppy_is_180k)? 0x00 :
|
(floppy_is_180k)? 0x00 :
|
(floppy_is_320k)? 0x00 :
|
(floppy_is_320k)? 0x00 :
|
(floppy_is_360k)? 0x00 :
|
(floppy_is_360k)? 0x00 :
|
(floppy_is_720k)? 0xC0 :
|
(floppy_is_720k)? 0xC0 :
|
(floppy_is_1_2m)? 0x00 :
|
(floppy_is_1_2m)? 0x00 :
|
(floppy_is_1_44m)? 0x80 :
|
(floppy_is_1_44m)? 0x80 :
|
(floppy_is_2_88m)? 0x40 :
|
(floppy_is_2_88m)? 0x40 :
|
0x20;
|
0x20;
|
|
|
IOWR(FLOPPY_BASE, 0x0, floppy_index >= 0? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x0, floppy_index >= 0? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
IOWR(FLOPPY_BASE, 0xC, floppy_media);
|
IOWR(FLOPPY_BASE, 0xC, floppy_media);
|
}
|
}
|
if(index == 8) { //writeprotect
|
if(index == 8) { //writeprotect
|
floppy_writeprotect = !floppy_writeprotect;
|
floppy_writeprotect = !floppy_writeprotect;
|
|
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
}
|
}
|
|
|
return;
|
return;
|
}
|
}
|
|
|
if(key == 'N') return;
|
if(key == 'N') return;
|
|
|
if(key == '^' && index == 8) index++;
|
if(key == '^' && index == 8) index++;
|
if(key == 'v' && index == 9) index--;
|
if(key == 'v' && index == 9) index--;
|
|
|
|
|
if(zero_delay_last && zero_delay) usleep(100000);
|
if(zero_delay_last && zero_delay) usleep(100000);
|
else usleep(300000);
|
else usleep(300000);
|
|
|
zero_delay_last = zero_delay;
|
zero_delay_last = zero_delay;
|
}
|
}
|
}
|
}
|
|
|
void runtime_menu() {
|
void runtime_menu() {
|
//clear osd
|
//clear osd
|
for(int i=16; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
for(int i=16; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
|
|
osd_enable(true);
|
osd_enable(true);
|
|
|
//wait for key release
|
//wait for key release
|
while((IORD(PIO_INPUT_BASE, 0) & 0xF) != 0xF) { ; }
|
while((IORD(PIO_INPUT_BASE, 0) & 0xF) != 0xF) { ; }
|
|
|
if(floppy_index < 0) runtime_menu_no_floppy();
|
if(floppy_index < 0) runtime_menu_no_floppy();
|
else runtime_menu_floppy();
|
else runtime_menu_floppy();
|
|
|
osd_enable(false);
|
osd_enable(false);
|
|
|
//wait for key release
|
//wait for key release
|
while((IORD(PIO_INPUT_BASE, 0) & 0xF) != 0xF) { ; }
|
while((IORD(PIO_INPUT_BASE, 0) & 0xF) != 0xF) { ; }
|
}
|
}
|
|
|
int main() {
|
int main() {
|
|
|
//pc_bus
|
//pc_bus
|
IOWR(PC_BUS_BASE, 0, 0x00FFF0EA);
|
IOWR(PC_BUS_BASE, 0, 0x00FFF0EA);
|
IOWR(PC_BUS_BASE, 1, 0x000000F0);
|
IOWR(PC_BUS_BASE, 1, 0x000000F0);
|
|
|
//resets output
|
//resets output
|
IOWR(PIO_OUTPUT_BASE, 0, 0x01);
|
IOWR(PIO_OUTPUT_BASE, 0, 0x01);
|
|
|
//vga
|
//vga
|
osd_enable(false);
|
osd_enable(false);
|
usleep(1000000);
|
usleep(1000000);
|
|
|
for(int i=0; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
for(int i=0; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
|
|
osd_enable(true);
|
osd_enable(true);
|
|
|
osd_print(0*16+0, false, "ao486 SoC ver1.0");
|
osd_print(0*16+0, false, "ao486 SoC ver1.0");
|
|
|
osd_print(1*16+0, false, "SD init... ");
|
osd_print(1*16+0, false, "SD init... ");
|
osd_print(2*16+0, false, "SD header chk...");
|
osd_print(2*16+0, false, "SD header chk...");
|
|
|
//clear all sdram
|
//clear all sdram
|
//for(int i=0; i<134217728/4; i++) IOWR(SDRAM_BASE, i, 0);
|
//for(int i=0; i<134217728/4; i++) IOWR(SDRAM_BASE, i, 0);
|
|
|
//-------------------------------------------------------------------------- check sd card presence
|
//-------------------------------------------------------------------------- check sd card presence
|
usleep(1000000);
|
usleep(1000000);
|
int sd_status = IORD(DRIVER_SD_BASE, 0);
|
int sd_status = IORD(DRIVER_SD_BASE, 0);
|
while(sd_status != 2) {
|
while(sd_status != 2) {
|
osd_print(1*16+0, true, "SD reinit: %d ", sd_status);
|
osd_print(1*16+0, true, "SD reinit: %d ", sd_status);
|
|
|
while(sd_status == 0) {
|
while(sd_status == 0) {
|
usleep(1000000);
|
usleep(1000000);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
}
|
}
|
if(sd_status == 1) {
|
if(sd_status == 1) {
|
IOWR(DRIVER_SD_BASE, 3, 1); //control reinit;
|
IOWR(DRIVER_SD_BASE, 3, 1); //control reinit;
|
IOWR(DRIVER_SD_BASE, 3, 0); //control idle;
|
IOWR(DRIVER_SD_BASE, 3, 0); //control idle;
|
|
|
usleep(1000000);
|
usleep(1000000);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
}
|
}
|
}
|
}
|
osd_print(1*16+0, false, "SD OK ");
|
osd_print(1*16+0, false, "SD OK ");
|
|
|
//-------------------------------------------------------------------------- SD read header
|
//-------------------------------------------------------------------------- SD read header
|
|
|
IOWR(DRIVER_SD_BASE, 0, (int)entries); //Avalon address base
|
IOWR(DRIVER_SD_BASE, 0, (int)entries); //Avalon address base
|
IOWR(DRIVER_SD_BASE, 1, 0); //SD sector
|
IOWR(DRIVER_SD_BASE, 1, 0); //SD sector
|
IOWR(DRIVER_SD_BASE, 2, sizeof(entries)/512); //sector count
|
IOWR(DRIVER_SD_BASE, 2, sizeof(entries)/512); //sector count
|
IOWR(DRIVER_SD_BASE, 3, 2); //control READ
|
IOWR(DRIVER_SD_BASE, 3, 2); //control READ
|
|
|
//wait for ready
|
//wait for ready
|
sd_status = -1;
|
sd_status = -1;
|
while(sd_status != 2) {
|
while(sd_status != 2) {
|
usleep(100000);
|
usleep(100000);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
sd_status = IORD(DRIVER_SD_BASE, 0);
|
}
|
}
|
|
|
//check crc32
|
//check crc32
|
bool crc_ok = false;
|
bool crc_ok = false;
|
for(int i=0; i<ENTRIES_COUNT; i++) {
|
for(int i=0; i<ENTRIES_COUNT; i++) {
|
if(entries[i].type == TYPE_CRC32) {
|
if(entries[i].type == TYPE_CRC32) {
|
uint8 *ptr_start = (uint8 *)entries;
|
uint8 *ptr_start = (uint8 *)entries;
|
uint32 size = i*32;
|
uint32 size = i*32;
|
|
|
crc32(NULL, NULL);
|
crc32(NULL, NULL);
|
for(uint32 j=0; j<size; j++) crc32(ptr_start + j, NULL);
|
for(uint32 j=0; j<size; j++) crc32(ptr_start + j, NULL);
|
|
|
uint32 crc_calculated = 0;
|
uint32 crc_calculated = 0;
|
crc32(NULL, &crc_calculated);
|
crc32(NULL, &crc_calculated);
|
|
|
crc_ok = crc_calculated == entries[i].args.end_of_list.crc32;
|
crc_ok = crc_calculated == entries[i].args.end_of_list.crc32;
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
if(crc_ok == false) {
|
if(crc_ok == false) {
|
osd_print(2*16+0, true, "SD header invald");
|
osd_print(2*16+0, true, "SD header invald");
|
return 0;
|
return 0;
|
}
|
}
|
|
|
osd_print(2*16+0, false, "SD header OK ");
|
osd_print(2*16+0, false, "SD header OK ");
|
|
|
//-------------------------------------------------------------------------- load bios
|
//-------------------------------------------------------------------------- load bios
|
|
|
for(int i=16; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
for(int i=16; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
|
|
int bios_result = select_and_load_bios(TYPE_BIOS, 1, "--Select BIOS:--", "Loading BIOS... ", "Verifying BIOS..", "BIOS vrfy failed", "BIOS verify OK ");
|
int bios_result = select_and_load_bios(TYPE_BIOS, 1, "--Select BIOS:--", "Loading BIOS... ", "Verifying BIOS..", "BIOS vrfy failed", "BIOS verify OK ");
|
if(bios_result < 0) return 0;
|
if(bios_result < 0) return 0;
|
|
|
//-------------------------------------------------------------------------- load vgabios
|
//-------------------------------------------------------------------------- load vgabios
|
|
|
for(int i=32; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
for(int i=32; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
|
|
bios_result = select_and_load_bios(TYPE_VGABIOS, 2, "-Select VGABIOS:", "Loading VBIOS...", "Verfying VBIOS..", "VBIOS vrfy fail ", "VBIOS verify OK ");
|
bios_result = select_and_load_bios(TYPE_VGABIOS, 2, "-Select VGABIOS:", "Loading VBIOS...", "Verfying VBIOS..", "VBIOS vrfy fail ", "VBIOS verify OK ");
|
if(bios_result < 0) return 0;
|
if(bios_result < 0) return 0;
|
|
|
//-------------------------------------------------------------------------- select hdd
|
//-------------------------------------------------------------------------- select hdd
|
|
|
for(int i=16; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
for(int i=16; i<16*16; i++) IOWR(VGA_BASE, i, 0);
|
|
|
int menu_result = show_menu(0xFF, TYPE_HDD, false);
|
int menu_result = show_menu(0xFF, TYPE_HDD, false);
|
if(menu_result < 0) return 0;
|
if(menu_result < 0) return 0;
|
|
|
hdd_index = menu_result;
|
hdd_index = menu_result;
|
|
|
//--------------------------------------------------------------------------
|
//--------------------------------------------------------------------------
|
|
|
osd_enable(false);
|
osd_enable(false);
|
|
|
//-------------------------------------------------------------------------- sound
|
//-------------------------------------------------------------------------- sound
|
/*
|
/*
|
0-255.[15:0]: cycles in period
|
0-255.[15:0]: cycles in period
|
256.[12:0]: cycles in 80us
|
256.[12:0]: cycles in 80us
|
257.[9:0]: cycles in 1 sample: 96000 Hz
|
257.[9:0]: cycles in 1 sample: 96000 Hz
|
*/
|
*/
|
|
|
double cycle_in_ns = (1000000000.0 / ALT_CPU_CPU_FREQ); //33.333333;
|
double cycle_in_ns = (1000000000.0 / ALT_CPU_CPU_FREQ); //33.333333;
|
for(int i=0; i<256; i++) {
|
for(int i=0; i<256; i++) {
|
double f = 1000000.0 / (256.0-i);
|
double f = 1000000.0 / (256.0-i);
|
|
|
double cycles_in_period = 1000000000.0 / (f * cycle_in_ns);
|
double cycles_in_period = 1000000000.0 / (f * cycle_in_ns);
|
IOWR(SOUND_BASE, i, (int)cycles_in_period);
|
IOWR(SOUND_BASE, i, (int)cycles_in_period);
|
}
|
}
|
|
|
IOWR(SOUND_BASE, 256, (int)(80000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(SOUND_BASE, 256, (int)(80000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(SOUND_BASE, 257, (int)((1000000000.0/96000.0) / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(SOUND_BASE, 257, (int)((1000000000.0/96000.0) / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
|
|
//-------------------------------------------------------------------------- pit
|
//-------------------------------------------------------------------------- pit
|
/*
|
/*
|
0.[7:0]: cycles in sysclock 1193181 Hz
|
0.[7:0]: cycles in sysclock 1193181 Hz
|
*/
|
*/
|
|
|
IOWR(PIT_BASE, 0, (int)((1000000000.0/1193181.0) / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(PIT_BASE, 0, (int)((1000000000.0/1193181.0) / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
|
|
//-------------------------------------------------------------------------- floppy
|
//-------------------------------------------------------------------------- floppy
|
|
|
int floppy_sd_base = 0;
|
int floppy_sd_base = 0;
|
|
|
/*
|
/*
|
0x00.[0]: media present
|
0x00.[0]: media present
|
0x01.[0]: media writeprotect
|
0x01.[0]: media writeprotect
|
0x02.[7:0]: media cylinders
|
0x02.[7:0]: media cylinders
|
0x03.[7:0]: media sectors per track
|
0x03.[7:0]: media sectors per track
|
0x04.[31:0]: media total sector count
|
0x04.[31:0]: media total sector count
|
0x05.[1:0]: media heads
|
0x05.[1:0]: media heads
|
0x06.[31:0]: media sd base
|
0x06.[31:0]: media sd base
|
0x07.[15:0]: media wait cycles: 200000 us / spt
|
0x07.[15:0]: media wait cycles: 200000 us / spt
|
0x08.[15:0]: media wait rate 0: 1000 us
|
0x08.[15:0]: media wait rate 0: 1000 us
|
0x09.[15:0]: media wait rate 1: 1666 us
|
0x09.[15:0]: media wait rate 1: 1666 us
|
0x0A.[15:0]: media wait rate 2: 2000 us
|
0x0A.[15:0]: media wait rate 2: 2000 us
|
0x0B.[15:0]: media wait rate 3: 500 us
|
0x0B.[15:0]: media wait rate 3: 500 us
|
0x0C.[7:0]: media type: 8'h20 none; 8'h00 old; 8'hC0 720k; 8'h80 1_44M; 8'h40 2_88M
|
0x0C.[7:0]: media type: 8'h20 none; 8'h00 old; 8'hC0 720k; 8'h80 1_44M; 8'h40 2_88M
|
*/
|
*/
|
|
|
int floppy_cylinders = (floppy_is_2_88m || floppy_is_1_44m || floppy_is_1_2m || floppy_is_720k)? 80 : 40;
|
int floppy_cylinders = (floppy_is_2_88m || floppy_is_1_44m || floppy_is_1_2m || floppy_is_720k)? 80 : 40;
|
int floppy_spt =
|
int floppy_spt =
|
(floppy_is_160k)? 8 :
|
(floppy_is_160k)? 8 :
|
(floppy_is_180k)? 9 :
|
(floppy_is_180k)? 9 :
|
(floppy_is_320k)? 8 :
|
(floppy_is_320k)? 8 :
|
(floppy_is_360k)? 9 :
|
(floppy_is_360k)? 9 :
|
(floppy_is_720k)? 9 :
|
(floppy_is_720k)? 9 :
|
(floppy_is_1_2m)? 15 :
|
(floppy_is_1_2m)? 15 :
|
(floppy_is_1_44m)? 18 :
|
(floppy_is_1_44m)? 18 :
|
(floppy_is_2_88m)? 36 :
|
(floppy_is_2_88m)? 36 :
|
0;
|
0;
|
int floppy_total_sectors =
|
int floppy_total_sectors =
|
(floppy_is_160k)? 320 :
|
(floppy_is_160k)? 320 :
|
(floppy_is_180k)? 360 :
|
(floppy_is_180k)? 360 :
|
(floppy_is_320k)? 640 :
|
(floppy_is_320k)? 640 :
|
(floppy_is_360k)? 720 :
|
(floppy_is_360k)? 720 :
|
(floppy_is_720k)? 1440 :
|
(floppy_is_720k)? 1440 :
|
(floppy_is_1_2m)? 2400 :
|
(floppy_is_1_2m)? 2400 :
|
(floppy_is_1_44m)? 2880 :
|
(floppy_is_1_44m)? 2880 :
|
(floppy_is_2_88m)? 5760 :
|
(floppy_is_2_88m)? 5760 :
|
0;
|
0;
|
int floppy_heads = (floppy_is_160k || floppy_is_180k)? 1 : 2;
|
int floppy_heads = (floppy_is_160k || floppy_is_180k)? 1 : 2;
|
|
|
int floppy_wait_cycles = 200000000 / floppy_spt;
|
int floppy_wait_cycles = 200000000 / floppy_spt;
|
|
|
int floppy_media =
|
int floppy_media =
|
(floppy_index < 0)? 0x20 :
|
(floppy_index < 0)? 0x20 :
|
(floppy_is_160k)? 0x00 :
|
(floppy_is_160k)? 0x00 :
|
(floppy_is_180k)? 0x00 :
|
(floppy_is_180k)? 0x00 :
|
(floppy_is_320k)? 0x00 :
|
(floppy_is_320k)? 0x00 :
|
(floppy_is_360k)? 0x00 :
|
(floppy_is_360k)? 0x00 :
|
(floppy_is_720k)? 0xC0 :
|
(floppy_is_720k)? 0xC0 :
|
(floppy_is_1_2m)? 0x00 :
|
(floppy_is_1_2m)? 0x00 :
|
(floppy_is_1_44m)? 0x80 :
|
(floppy_is_1_44m)? 0x80 :
|
(floppy_is_2_88m)? 0x40 :
|
(floppy_is_2_88m)? 0x40 :
|
0x20;
|
0x20;
|
|
|
IOWR(FLOPPY_BASE, 0x0, floppy_index >= 0? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x0, floppy_index >= 0? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x1, floppy_writeprotect? 1 : 0);
|
IOWR(FLOPPY_BASE, 0x2, floppy_cylinders);
|
IOWR(FLOPPY_BASE, 0x2, floppy_cylinders);
|
IOWR(FLOPPY_BASE, 0x3, floppy_spt);
|
IOWR(FLOPPY_BASE, 0x3, floppy_spt);
|
IOWR(FLOPPY_BASE, 0x4, floppy_total_sectors);
|
IOWR(FLOPPY_BASE, 0x4, floppy_total_sectors);
|
IOWR(FLOPPY_BASE, 0x5, floppy_heads);
|
IOWR(FLOPPY_BASE, 0x5, floppy_heads);
|
IOWR(FLOPPY_BASE, 0x6, floppy_sd_base);
|
IOWR(FLOPPY_BASE, 0x6, floppy_sd_base);
|
IOWR(FLOPPY_BASE, 0x7, (int)(floppy_wait_cycles / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0x7, (int)(floppy_wait_cycles / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0x8, (int)(1000000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0x8, (int)(1000000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0x9, (int)(1666666.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0x9, (int)(1666666.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0xA, (int)(2000000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0xA, (int)(2000000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0xB, (int)(500000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0xB, (int)(500000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(FLOPPY_BASE, 0xC, floppy_media);
|
IOWR(FLOPPY_BASE, 0xC, floppy_media);
|
|
|
//-------------------------------------------------------------------------- hdd
|
//-------------------------------------------------------------------------- hdd
|
|
|
unsigned int hd_cylinders = entries[hdd_index].args.hdd.cyliders; //1-1024; 10 bits; implemented 16 bits
|
unsigned int hd_cylinders = entries[hdd_index].args.hdd.cyliders; //1-1024; 10 bits; implemented 16 bits
|
unsigned int hd_heads = entries[hdd_index].args.hdd.heads; //1-16; 4 bits; at least 9 heads for cmos 0x20
|
unsigned int hd_heads = entries[hdd_index].args.hdd.heads; //1-16; 4 bits; at least 9 heads for cmos 0x20
|
unsigned int hd_spt = entries[hdd_index].args.hdd.spt; //1-255; 8 bits;
|
unsigned int hd_spt = entries[hdd_index].args.hdd.spt; //1-255; 8 bits;
|
|
|
int hdd_sd_base = entries[hdd_index].args.hdd.sector;
|
int hdd_sd_base = entries[hdd_index].args.hdd.sector;
|
|
|
unsigned int hd_total_sectors = hd_cylinders * hd_heads * hd_spt;
|
unsigned int hd_total_sectors = hd_cylinders * hd_heads * hd_spt;
|
|
|
/*
|
/*
|
0x00.[31:0]: identify write
|
0x00.[31:0]: identify write
|
0x01.[16:0]: media cylinders
|
0x01.[16:0]: media cylinders
|
0x02.[4:0]: media heads
|
0x02.[4:0]: media heads
|
0x03.[8:0]: media spt
|
0x03.[8:0]: media spt
|
0x04.[13:0]: media sectors per cylinder = spt * heads
|
0x04.[13:0]: media sectors per cylinder = spt * heads
|
0x05.[31:0]: media sectors total
|
0x05.[31:0]: media sectors total
|
0x06.[31:0]: media sd base
|
0x06.[31:0]: media sd base
|
*/
|
*/
|
|
|
unsigned int identify[256] = {
|
unsigned int identify[256] = {
|
0x0040, //word 0
|
0x0040, //word 0
|
(hd_cylinders > 16383)? 16383 : hd_cylinders, //word 1
|
(hd_cylinders > 16383)? 16383 : hd_cylinders, //word 1
|
0x0000, //word 2 reserved
|
0x0000, //word 2 reserved
|
hd_heads, //word 3
|
hd_heads, //word 3
|
(unsigned short)(512 * hd_spt), //word 4
|
(unsigned short)(512 * hd_spt), //word 4
|
512, //word 5
|
512, //word 5
|
hd_spt, //word 6
|
hd_spt, //word 6
|
0x0000, //word 7 vendor specific
|
0x0000, //word 7 vendor specific
|
0x0000, //word 8 vendor specific
|
0x0000, //word 8 vendor specific
|
0x0000, //word 9 vendor specific
|
0x0000, //word 9 vendor specific
|
('A' << 8) | 'O', //word 10
|
('A' << 8) | 'O', //word 10
|
('H' << 8) | 'D', //word 11
|
('H' << 8) | 'D', //word 11
|
('0' << 8) | '0', //word 12
|
('0' << 8) | '0', //word 12
|
('0' << 8) | '0', //word 13
|
('0' << 8) | '0', //word 13
|
('0' << 8) | ' ', //word 14
|
('0' << 8) | ' ', //word 14
|
(' ' << 8) | ' ', //word 15
|
(' ' << 8) | ' ', //word 15
|
(' ' << 8) | ' ', //word 16
|
(' ' << 8) | ' ', //word 16
|
(' ' << 8) | ' ', //word 17
|
(' ' << 8) | ' ', //word 17
|
(' ' << 8) | ' ', //word 18
|
(' ' << 8) | ' ', //word 18
|
(' ' << 8) | ' ', //word 19
|
(' ' << 8) | ' ', //word 19
|
3, //word 20 buffer type
|
3, //word 20 buffer type
|
512, //word 21 cache size
|
512, //word 21 cache size
|
4, //word 22 number of ecc bytes
|
4, //word 22 number of ecc bytes
|
0,0,0,0, //words 23..26 firmware revision
|
0,0,0,0, //words 23..26 firmware revision
|
('A' << 8) | 'O', //words 27..46 model number
|
('A' << 8) | 'O', //words 27..46 model number
|
(' ' << 8) | 'H',
|
(' ' << 8) | 'H',
|
('a' << 8) | 'r',
|
('a' << 8) | 'r',
|
('d' << 8) | 'd',
|
('d' << 8) | 'd',
|
('r' << 8) | 'i',
|
('r' << 8) | 'i',
|
('v' << 8) | 'e',
|
('v' << 8) | 'e',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
(' ' << 8) | ' ',
|
16, //word 47 max multiple sectors
|
16, //word 47 max multiple sectors
|
1, //word 48 dword io
|
1, //word 48 dword io
|
1<<9, //word 49 lba supported
|
1<<9, //word 49 lba supported
|
0x0000, //word 50 reserved
|
0x0000, //word 50 reserved
|
0x0200, //word 51 pio timing
|
0x0200, //word 51 pio timing
|
0x0200, //word 52 pio timing
|
0x0200, //word 52 pio timing
|
0x0007, //word 53 valid fields
|
0x0007, //word 53 valid fields
|
(hd_cylinders > 16383)? 16383 : hd_cylinders, //word 54
|
(hd_cylinders > 16383)? 16383 : hd_cylinders, //word 54
|
hd_heads, //word 55
|
hd_heads, //word 55
|
hd_spt, //word 56
|
hd_spt, //word 56
|
hd_total_sectors & 0xFFFF, //word 57
|
hd_total_sectors & 0xFFFF, //word 57
|
hd_total_sectors >> 16, //word 58
|
hd_total_sectors >> 16, //word 58
|
0x0000, //word 59 multiple sectors
|
0x0000, //word 59 multiple sectors
|
hd_total_sectors & 0xFFFF, //word 60
|
hd_total_sectors & 0xFFFF, //word 60
|
hd_total_sectors >> 16, //word 61
|
hd_total_sectors >> 16, //word 61
|
0x0000, //word 62 single word dma modes
|
0x0000, //word 62 single word dma modes
|
0x0000, //word 63 multiple word dma modes
|
0x0000, //word 63 multiple word dma modes
|
0x0000, //word 64 pio modes
|
0x0000, //word 64 pio modes
|
120,120,120,120, //word 65..68
|
120,120,120,120, //word 65..68
|
0,0,0,0,0,0,0,0,0,0,0, //word 69..79
|
0,0,0,0,0,0,0,0,0,0,0, //word 69..79
|
0x007E, //word 80 ata modes
|
0x007E, //word 80 ata modes
|
0x0000, //word 81 minor version number
|
0x0000, //word 81 minor version number
|
1<<14, //word 82 supported commands
|
1<<14, //word 82 supported commands
|
(1<<14) | (1<<13) | (1<<12) | (1<<10), //word 83
|
(1<<14) | (1<<13) | (1<<12) | (1<<10), //word 83
|
1<<14, //word 84
|
1<<14, //word 84
|
1<<14, //word 85
|
1<<14, //word 85
|
(1<<14) | (1<<13) | (1<<12) | (1<<10), //word 86
|
(1<<14) | (1<<13) | (1<<12) | (1<<10), //word 86
|
1<<14, //word 87
|
1<<14, //word 87
|
0x0000, //word 88
|
0x0000, //word 88
|
0,0,0,0, //word 89..92
|
0,0,0,0, //word 89..92
|
1 | (1<<14) | 0x2000, //word 93
|
1 | (1<<14) | 0x2000, //word 93
|
0,0,0,0,0,0, //word 94..99
|
0,0,0,0,0,0, //word 94..99
|
hd_total_sectors & 0xFFFF, //word 100
|
hd_total_sectors & 0xFFFF, //word 100
|
hd_total_sectors >> 16, //word 101
|
hd_total_sectors >> 16, //word 101
|
0, //word 102
|
0, //word 102
|
0, //word 103
|
0, //word 103
|
|
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//word 104..127
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,//word 104..127
|
|
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, //word 128..255
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, //word 128..255
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
};
|
};
|
|
|
|
|
for(int i=0; i<128; i++) IOWR(HDD_BASE, 0, ((unsigned int)identify[2*i+1] << 16) | (unsigned int)identify[2*i+0]);
|
for(int i=0; i<128; i++) IOWR(HDD_BASE, 0, ((unsigned int)identify[2*i+1] << 16) | (unsigned int)identify[2*i+0]);
|
|
|
IOWR(HDD_BASE, 1, hd_cylinders);
|
IOWR(HDD_BASE, 1, hd_cylinders);
|
IOWR(HDD_BASE, 2, hd_heads);
|
IOWR(HDD_BASE, 2, hd_heads);
|
IOWR(HDD_BASE, 3, hd_spt);
|
IOWR(HDD_BASE, 3, hd_spt);
|
IOWR(HDD_BASE, 4, hd_spt * hd_heads);
|
IOWR(HDD_BASE, 4, hd_spt * hd_heads);
|
IOWR(HDD_BASE, 5, hd_spt * hd_heads * hd_cylinders);
|
IOWR(HDD_BASE, 5, hd_spt * hd_heads * hd_cylinders);
|
IOWR(HDD_BASE, 6, hdd_sd_base);
|
IOWR(HDD_BASE, 6, hdd_sd_base);
|
|
|
//-------------------------------------------------------------------------- rtc
|
//-------------------------------------------------------------------------- rtc
|
|
|
bool boot_from_floppy = true;
|
bool boot_from_floppy = true;
|
|
|
/*
|
/*
|
128.[26:0]: cycles in second
|
128.[26:0]: cycles in second
|
129.[12:0]: cycles in 122.07031 us
|
129.[12:0]: cycles in 122.07031 us
|
*/
|
*/
|
|
|
IOWR(RTC_BASE, 128, (int)(1000000000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(RTC_BASE, 128, (int)(1000000000.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(RTC_BASE, 129, (int)(122070.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
IOWR(RTC_BASE, 129, (int)(122070.0 / (1000000000.0 / ALT_CPU_CPU_FREQ)));
|
|
|
unsigned char fdd_type = (floppy_is_2_88m)? 0x50 : (floppy_is_1_44m)? 0x40 : (floppy_is_720k)? 0x30 : (floppy_is_1_2m)? 0x20 : 0x10;
|
unsigned char fdd_type = (floppy_is_2_88m)? 0x50 : (floppy_is_1_44m)? 0x40 : (floppy_is_720k)? 0x30 : (floppy_is_1_2m)? 0x20 : 0x10;
|
|
|
bool translate_none = hd_cylinders <= 1024 && hd_heads <= 16 && hd_spt <= 63;
|
bool translate_none = hd_cylinders <= 1024 && hd_heads <= 16 && hd_spt <= 63;
|
bool translate_large= !translate_none && (hd_cylinders * hd_heads) <= 131072;
|
bool translate_large= !translate_none && (hd_cylinders * hd_heads) <= 131072;
|
bool translate_lba = !translate_none && !translate_large;
|
bool translate_lba = !translate_none && !translate_large;
|
|
|
unsigned char translate_byte = (translate_large)? 1 : (translate_lba)? 2 : 0;
|
unsigned char translate_byte = (translate_large)? 1 : (translate_lba)? 2 : 0;
|
|
|
//rtc contents 0-127
|
//rtc contents 0-127
|
unsigned int cmos[128] = {
|
unsigned int cmos[128] = {
|
0x00, //0x00: SEC BCD
|
0x00, //0x00: SEC BCD
|
0x00, //0x01: ALARM SEC BCD
|
0x00, //0x01: ALARM SEC BCD
|
0x00, //0x02: MIN BCD
|
0x00, //0x02: MIN BCD
|
0x00, //0x03: ALARM MIN BCD
|
0x00, //0x03: ALARM MIN BCD
|
0x12, //0x04: HOUR BCD 24h
|
0x12, //0x04: HOUR BCD 24h
|
0x12, //0x05: ALARM HOUR BCD 24h
|
0x12, //0x05: ALARM HOUR BCD 24h
|
0x01, //0x06: DAY OF WEEK Sunday=1
|
0x01, //0x06: DAY OF WEEK Sunday=1
|
0x03, //0x07: DAY OF MONTH BCD from 1
|
0x03, //0x07: DAY OF MONTH BCD from 1
|
0x11, //0x08: MONTH BCD from 1
|
0x11, //0x08: MONTH BCD from 1
|
0x13, //0x09: YEAR BCD
|
0x13, //0x09: YEAR BCD
|
0x26, //0x0A: REG A
|
0x26, //0x0A: REG A
|
0x02, //0x0B: REG B
|
0x02, //0x0B: REG B
|
0x00, //0x0C: REG C
|
0x00, //0x0C: REG C
|
0x80, //0x0D: REG D
|
0x80, //0x0D: REG D
|
0x00, //0x0E: REG E - POST status
|
0x00, //0x0E: REG E - POST status
|
0x00, //0x0F: REG F - shutdown status
|
0x00, //0x0F: REG F - shutdown status
|
|
|
fdd_type, //0x10: floppy drive type; 0-none, 1-360K, 2-1.2M, 3-720K, 4-1.44M, 5-2.88M
|
fdd_type, //0x10: floppy drive type; 0-none, 1-360K, 2-1.2M, 3-720K, 4-1.44M, 5-2.88M
|
0x00, //0x11: configuration bits; not used
|
0x00, //0x11: configuration bits; not used
|
0xF0, //0x12: hard disk types; 0-none, 1:E-type, F-type 16+
|
0xF0, //0x12: hard disk types; 0-none, 1:E-type, F-type 16+
|
0x00, //0x13: advanced configuration bits; not used
|
0x00, //0x13: advanced configuration bits; not used
|
0x0D, //0x14: equipment bits
|
0x0D, //0x14: equipment bits
|
0x80, //0x15: base memory in 1k LSB
|
0x80, //0x15: base memory in 1k LSB
|
0x02, //0x16: base memory in 1k MSB
|
0x02, //0x16: base memory in 1k MSB
|
0x00, //0x17: memory size above 1m in 1k LSB
|
0x00, //0x17: memory size above 1m in 1k LSB
|
0xFC, //0x18: memory size above 1m in 1k MSB
|
0xFC, //0x18: memory size above 1m in 1k MSB
|
0x2F, //0x19: extended hd types 1/2; type 47d
|
0x2F, //0x19: extended hd types 1/2; type 47d
|
0x00, //0x1A: extended hd types 2/2
|
0x00, //0x1A: extended hd types 2/2
|
|
|
hd_cylinders & 0xFF, //0x1B: hd 0 configuration 1/9; cylinders low
|
hd_cylinders & 0xFF, //0x1B: hd 0 configuration 1/9; cylinders low
|
(hd_cylinders >> 8) & 0xFF, //0x1C: hd 0 configuration 2/9; cylinders high
|
(hd_cylinders >> 8) & 0xFF, //0x1C: hd 0 configuration 2/9; cylinders high
|
hd_heads, //0x1D: hd 0 configuration 3/9; heads
|
hd_heads, //0x1D: hd 0 configuration 3/9; heads
|
0xFF, //0x1E: hd 0 configuration 4/9; write pre-comp low
|
0xFF, //0x1E: hd 0 configuration 4/9; write pre-comp low
|
0xFF, //0x1F: hd 0 configuration 5/9; write pre-comp high
|
0xFF, //0x1F: hd 0 configuration 5/9; write pre-comp high
|
0xC8, //0x20: hd 0 configuration 6/9; retries/bad map/heads>8
|
0xC8, //0x20: hd 0 configuration 6/9; retries/bad map/heads>8
|
hd_cylinders & 0xFF, //0x21: hd 0 configuration 7/9; landing zone low
|
hd_cylinders & 0xFF, //0x21: hd 0 configuration 7/9; landing zone low
|
(hd_cylinders >> 8) & 0xFF, //0x22: hd 0 configuration 8/9; landing zone high
|
(hd_cylinders >> 8) & 0xFF, //0x22: hd 0 configuration 8/9; landing zone high
|
hd_spt, //0x23: hd 0 configuration 9/9; sectors/track
|
hd_spt, //0x23: hd 0 configuration 9/9; sectors/track
|
|
|
0x00, //0x24: hd 1 configuration 1/9
|
0x00, //0x24: hd 1 configuration 1/9
|
0x00, //0x25: hd 1 configuration 2/9
|
0x00, //0x25: hd 1 configuration 2/9
|
0x00, //0x26: hd 1 configuration 3/9
|
0x00, //0x26: hd 1 configuration 3/9
|
0x00, //0x27: hd 1 configuration 4/9
|
0x00, //0x27: hd 1 configuration 4/9
|
0x00, //0x28: hd 1 configuration 5/9
|
0x00, //0x28: hd 1 configuration 5/9
|
0x00, //0x29: hd 1 configuration 6/9
|
0x00, //0x29: hd 1 configuration 6/9
|
0x00, //0x2A: hd 1 configuration 7/9
|
0x00, //0x2A: hd 1 configuration 7/9
|
0x00, //0x2B: hd 1 configuration 8/9
|
0x00, //0x2B: hd 1 configuration 8/9
|
0x00, //0x2C: hd 1 configuration 9/9
|
0x00, //0x2C: hd 1 configuration 9/9
|
|
|
(boot_from_floppy)? 0x20u : 0x00u, //0x2D: boot sequence
|
(boot_from_floppy)? 0x20u : 0x00u, //0x2D: boot sequence
|
|
|
0x00, //0x2E: checksum MSB
|
0x00, //0x2E: checksum MSB
|
0x00, //0x2F: checksum LSB
|
0x00, //0x2F: checksum LSB
|
|
|
0x00, //0x30: memory size above 1m in 1k LSB
|
0x00, //0x30: memory size above 1m in 1k LSB
|
0xFC, //0x31: memory size above 1m in 1k MSB
|
0xFC, //0x31: memory size above 1m in 1k MSB
|
|
|
0x20, //0x32: IBM century
|
0x20, //0x32: IBM century
|
0x00, //0x33: ?
|
0x00, //0x33: ?
|
|
|
0x00, //0x34: memory size above 16m in 64k LSB
|
0x00, //0x34: memory size above 16m in 64k LSB
|
0x07, //0x35: memory size above 16m in 64k MSB; 128 MB
|
0x07, //0x35: memory size above 16m in 64k MSB; 128 MB
|
|
|
0x00, //0x36: ?
|
0x00, //0x36: ?
|
0x20, //0x37: IBM PS/2 century
|
0x20, //0x37: IBM PS/2 century
|
|
|
0x00, //0x38: eltorito boot sequence; not used
|
0x00, //0x38: eltorito boot sequence; not used
|
translate_byte, //0x39: ata translation policy 1/2
|
translate_byte, //0x39: ata translation policy 1/2
|
0x00, //0x3A: ata translation policy 2/2
|
0x00, //0x3A: ata translation policy 2/2
|
|
|
0x00, //0x3B: ?
|
0x00, //0x3B: ?
|
0x00, //0x3C: ?
|
0x00, //0x3C: ?
|
|
|
0x00, //0x3D: eltorito boot sequence; not used
|
0x00, //0x3D: eltorito boot sequence; not used
|
|
|
0x00, //0x3E: ?
|
0x00, //0x3E: ?
|
0x00, //0x3F: ?
|
0x00, //0x3F: ?
|
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
};
|
};
|
|
|
//count checksum
|
//count checksum
|
unsigned short sum = 0;
|
unsigned short sum = 0;
|
for(int i=0x10; i<=0x2D; i++) sum += cmos[i];
|
for(int i=0x10; i<=0x2D; i++) sum += cmos[i];
|
|
|
cmos[0x2E] = sum >> 8;
|
cmos[0x2E] = sum >> 8;
|
cmos[0x2F] = sum & 0xFF;
|
cmos[0x2F] = sum & 0xFF;
|
|
|
for(unsigned int i=0; i<sizeof(cmos)/sizeof(unsigned int); i++) IOWR(RTC_BASE, i, cmos[i]);
|
for(unsigned int i=0; i<sizeof(cmos)/sizeof(unsigned int); i++) IOWR(RTC_BASE, i, cmos[i]);
|
|
|
//--------------------------------------------------------------------------
|
//--------------------------------------------------------------------------
|
|
|
//--------------------------------------------------------------------------
|
//--------------------------------------------------------------------------
|
|
|
//--------------------------------------------------------------------------
|
//--------------------------------------------------------------------------
|
|
|
alt_irq_disable_all();
|
alt_irq_disable_all();
|
|
|
|
runtime_menu();
|
|
|
//release reset - start executing
|
//release reset - start executing
|
IOWR(PIO_OUTPUT_BASE, 0, 0x00);
|
IOWR(PIO_OUTPUT_BASE, 0, 0x00);
|
|
|
while(true) {
|
while(true) {
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
uint32 keys = IORD(PIO_INPUT_BASE, 0);
|
if((keys & 0x4) == 0) runtime_menu();
|
if((keys & 0x4) == 0) runtime_menu();
|
|
|
int cmd = read_byte_if_possible();
|
int cmd = read_byte_if_possible();
|
if(cmd < 0) continue;
|
if(cmd < 0) continue;
|
|
|
if(cmd == 0) {
|
if(cmd == 0) {
|
unsigned int offset = read_int();
|
unsigned int offset = read_int();
|
unsigned int size = read_int();
|
unsigned int size = read_int();
|
|
|
crc32(NULL, NULL);
|
crc32(NULL, NULL);
|
unsigned char *ptr = (unsigned char *)(SDRAM_BASE + offset);
|
unsigned char *ptr = (unsigned char *)(SDRAM_BASE + offset);
|
|
|
for(unsigned int i=0; i<size; i++) {
|
for(unsigned int i=0; i<size; i++) {
|
ptr[i] = read_byte();
|
ptr[i] = read_byte();
|
crc32(ptr + i, NULL);
|
crc32(ptr + i, NULL);
|
if((i%1024) == 0) printf("%08x - %d%%\n", (unsigned int)(ptr+i), (i*100/size));
|
if((i%1024) == 0) printf("%08x - %d%%\n", (unsigned int)(ptr+i), (i*100/size));
|
}
|
}
|
|
|
unsigned int recv_crc = read_int();
|
unsigned int recv_crc = read_int();
|
unsigned int copy_crc = 0;
|
unsigned int copy_crc = 0;
|
crc32(NULL, ©_crc);
|
crc32(NULL, ©_crc);
|
|
|
unsigned int local_crc = 0;
|
unsigned int local_crc = 0;
|
crc32(NULL, NULL);
|
crc32(NULL, NULL);
|
for(unsigned int i=0; i<size; i++) crc32(ptr + i, NULL);
|
for(unsigned int i=0; i<size; i++) crc32(ptr + i, NULL);
|
crc32(NULL, &local_crc);
|
crc32(NULL, &local_crc);
|
|
|
IOWR(JTAG_UART_BASE, 0, (recv_crc == copy_crc && recv_crc == local_crc)? 'Y' : 'N');
|
IOWR(JTAG_UART_BASE, 0, (recv_crc == copy_crc && recv_crc == local_crc)? 'Y' : 'N');
|
}
|
}
|
else if(cmd == 's') {
|
else if(cmd == 's') {
|
printf("\nStarting ao486...");
|
printf("\nStarting ao486...");
|
//release reset
|
//release reset
|
IOWR(PIO_OUTPUT_BASE, 0, 0x00);
|
IOWR(PIO_OUTPUT_BASE, 0, 0x00);
|
|
|
IOWR(JTAG_UART_BASE, 0, '\n');
|
IOWR(JTAG_UART_BASE, 0, '\n');
|
|
|
}
|
}
|
else if(cmd == 'd') {
|
else if(cmd == 'd') {
|
printf("\nStopping ao486...");
|
printf("\nStopping ao486...");
|
|
|
//release reset
|
//release reset
|
IOWR(PIO_OUTPUT_BASE, 0, 0x01);
|
IOWR(PIO_OUTPUT_BASE, 0, 0x01);
|
|
|
IOWR(JTAG_UART_BASE, 0, '\n');
|
IOWR(JTAG_UART_BASE, 0, '\n');
|
}
|
}
|
else if(cmd == 'v') {
|
else if(cmd == 'v') {
|
osd_enable(true);
|
osd_enable(true);
|
}
|
}
|
else if(cmd == 'b') {
|
else if(cmd == 'b') {
|
osd_enable(false);
|
osd_enable(false);
|
}
|
}
|
else if(cmd == 'j') {
|
else if(cmd == 'j') {
|
printf("\nJTAG: %08x\n", IORD(JTAG_UART_BASE, 1));
|
printf("\nJTAG: %08x\n", IORD(JTAG_UART_BASE, 1));
|
}
|
}
|
else {
|
else {
|
IOWR(JTAG_UART_BASE, 0, 'N');
|
IOWR(JTAG_UART_BASE, 0, 'N');
|
}
|
}
|
}
|
}
|
|
|
//--------------------------------------------------------------------------
|
//--------------------------------------------------------------------------
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
