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[/] [artec_dongle_ii_fpga/] [trunk/] [src/] [postcode_ser/] [fifo_inst.vhd] - Diff between revs 2 and 6

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Rev 2 Rev 6
fifo_inst : fifo PORT MAP (
fifo_inst : fifo PORT MAP (
                aclr     => aclr_sig,
                aclr     => aclr_sig,
                clock    => clock_sig,
                clock    => clock_sig,
                data     => data_sig,
                data     => data_sig,
                rdreq    => rdreq_sig,
                rdreq    => rdreq_sig,
                wrreq    => wrreq_sig,
                wrreq    => wrreq_sig,
                almost_full      => almost_full_sig,
                almost_full      => almost_full_sig,
                empty    => empty_sig,
                empty    => empty_sig,
                full     => full_sig,
                full     => full_sig,
                q        => q_sig,
                q        => q_sig,
                usedw    => usedw_sig
                usedw    => usedw_sig
        );
        );
 
 

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