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URL https://opencores.org/ocsvn/astron_diagnostics/astron_diagnostics/trunk

Subversion Repositories astron_diagnostics

[/] [astron_diagnostics/] [trunk/] [hdllib.cfg] - Diff between revs 2 and 4

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Rev 2 Rev 4
hdl_lib_name = diag
hdl_lib_name = astron_diagnostics
hdl_library_clause_name = diag_lib
hdl_library_clause_name = astron_diagnostics_lib
hdl_lib_uses_synth = common_pkg dp_pkg dp_components common_components common_ram common_counter common_ram dp_mux technology mm dp_pipeline #common_mult
hdl_lib_uses_synth = common_pkg dp_pkg dp_components common_components astron_ram astron_counter astron_ram astron_multiplexer astron_mm astron_pipeline
hdl_lib_uses_sim =
hdl_lib_uses_sim =
hdl_lib_technology =
hdl_lib_technology =
synth_files =
synth_files =
    diag_pkg.vhd
    diag_pkg.vhd
#    src/vhdl/diag_bypass.vhd
#    src/vhdl/diag_bypass.vhd
#    src/vhdl/diag_tx_frm.vhd
#    src/vhdl/diag_tx_frm.vhd
    diag_rx_seq.vhd
    diag_rx_seq.vhd
#    src/vhdl/diag_frm_generator.vhd
#    src/vhdl/diag_frm_generator.vhd
#    src/vhdl/diag_frm_monitor.vhd
#    src/vhdl/diag_frm_monitor.vhd
    mms_diag_rx_seq.vhd
    mms_diag_rx_seq.vhd
#    src/vhdl/diag_wg.vhd
#    src/vhdl/diag_wg.vhd
#    src/vhdl/diag_wg_wideband.vhd
#    src/vhdl/diag_wg_wideband.vhd
#    src/vhdl/diag_wg_wideband_reg.vhd
#    src/vhdl/diag_wg_wideband_reg.vhd
#    src/vhdl/mms_diag_wg_wideband.vhd
#    src/vhdl/mms_diag_wg_wideband.vhd
    diag_data_buffer.vhd
    diag_data_buffer.vhd
#    src/vhdl/diag_data_buffer_dev.vhd
#    src/vhdl/diag_data_buffer_dev.vhd
    mms_diag_data_buffer.vhd
    mms_diag_data_buffer.vhd
#    src/vhdl/mms_diag_data_buffer_dev.vhd
#    src/vhdl/mms_diag_data_buffer_dev.vhd
    diag_tx_seq.vhd
    diag_tx_seq.vhd
    diag_block_gen.vhd
    diag_block_gen.vhd
    diag_block_gen_reg.vhd
    diag_block_gen_reg.vhd
    mms_diag_tx_seq.vhd
    mms_diag_tx_seq.vhd
    mms_diag_block_gen.vhd
    mms_diag_block_gen.vhd
test_bench_files =
test_bench_files =
#    tb/vhdl/tb_diag_pkg.vhd
#    tb/vhdl/tb_diag_pkg.vhd
#    tb/vhdl/tb_diag_wg.vhd
#    tb/vhdl/tb_diag_wg.vhd
#    tb/vhdl/tb_diag_wg_wideband.vhd
#    tb/vhdl/tb_diag_wg_wideband.vhd
#    tb/vhdl/tb_diag_tx_seq.vhd
#    tb/vhdl/tb_diag_tx_seq.vhd
#    tb/vhdl/tb_diag_rx_seq.vhd
#    tb/vhdl/tb_diag_rx_seq.vhd
#    tb/vhdl/tb_tb_diag_rx_seq.vhd
#    tb/vhdl/tb_tb_diag_rx_seq.vhd
#    tb/vhdl/tb_diag_tx_frm.vhd
#    tb/vhdl/tb_diag_tx_frm.vhd
#    tb/vhdl/tb_diag_frm_generator.vhd
#    tb/vhdl/tb_diag_frm_generator.vhd
#    tb/vhdl/tb_diag_frm_monitor.vhd
#    tb/vhdl/tb_diag_frm_monitor.vhd
#    tb/vhdl/tb_diag_data_buffer_dev.vhd
#    tb/vhdl/tb_diag_data_buffer_dev.vhd
#    tb/vhdl/tb_mms_diag_seq.vhd
#    tb/vhdl/tb_mms_diag_seq.vhd
#    tb/vhdl/tb_tb_mms_diag_seq.vhd
#    tb/vhdl/tb_tb_mms_diag_seq.vhd
#    tb/vhdl/tb_diag_block_gen.vhd
#    tb/vhdl/tb_diag_block_gen.vhd
#    tb/vhdl/tb_tb_diag_block_gen.vhd
#    tb/vhdl/tb_tb_diag_block_gen.vhd
#    tb/vhdl/tb_mms_diag_block_gen.vhd
#    tb/vhdl/tb_mms_diag_block_gen.vhd
#    tb/vhdl/tb_tb_mms_diag_block_gen.vhd
#    tb/vhdl/tb_tb_mms_diag_block_gen.vhd
#    tb/vhdl/tb_diag_regression.vhd
#    tb/vhdl/tb_diag_regression.vhd
regression_test_vhdl =
regression_test_vhdl =
#    tb/vhdl/tb_diag_wg.vhd
#    tb/vhdl/tb_diag_wg.vhd
#    tb/vhdl/tb_diag_wg_wideband.vhd
#    tb/vhdl/tb_diag_wg_wideband.vhd
#    tb/vhdl/tb_diag_frm_generator.vhd
#    tb/vhdl/tb_diag_frm_generator.vhd
#    tb/vhdl/tb_diag_frm_monitor.vhd
#    tb/vhdl/tb_diag_frm_monitor.vhd
#    tb/vhdl/tb_tb_diag_block_gen.vhd
#    tb/vhdl/tb_tb_diag_block_gen.vhd
#    tb/vhdl/tb_tb_diag_rx_seq.vhd
#    tb/vhdl/tb_tb_diag_rx_seq.vhd
#    tb/vhdl/tb_tb_mms_diag_seq.vhd
#    tb/vhdl/tb_tb_mms_diag_seq.vhd
#    tb/vhdl/tb_tb_mms_diag_block_gen.vhd
#    tb/vhdl/tb_tb_mms_diag_block_gen.vhd
[modelsim_project_file]
[modelsim_project_file]
modelsim_copy_files =
modelsim_copy_files =
    src/data data
#    src/data data
 
 
[quartus_project_file]
[quartus_project_file]
 
 

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