-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Copyright (C) 2009
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-- Copyright 2020
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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--
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--
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-- This program is free software: you can redistribute it and/or modify
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-- Licensed under the Apache License, Version 2.0 (the "License");
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-- it under the terms of the GNU General Public License as published by
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-- you may not use this file except in compliance with the License.
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-- the Free Software Foundation, either version 3 of the License, or
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-- You may obtain a copy of the License at
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-- (at your option) any later version.
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--
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--
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-- This program is distributed in the hope that it will be useful,
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-- http://www.apache.org/licenses/LICENSE-2.0
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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--
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-- You should have received a copy of the GNU General Public License
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-- Unless required by applicable law or agreed to in writing, software
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.
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-- distributed under the License is distributed on an "AS IS" BASIS,
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Purpose: Merges the data of multiple input streams into one output stream.
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-- Purpose: Merges the data of multiple input streams into one output stream.
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--
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--
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-- Description: An output stream is composed out of the input streams. The duty cycle
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-- Description: An output stream is composed out of the input streams. The duty cycle
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-- of the in_val signal must be 1/g_nof_streams in order
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-- of the in_val signal must be 1/g_nof_streams in order
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-- to avoid the loss of data.
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-- to avoid the loss of data.
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library IEEE, common_pkg_lib;
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library IEEE, common_pkg_lib;
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use IEEE.std_logic_1164.ALL;
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use IEEE.std_logic_1164.ALL;
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use common_pkg_lib.common_pkg.ALL;
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use common_pkg_lib.common_pkg.ALL;
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entity common_zip is
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entity common_zip is
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generic (
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generic (
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g_nof_streams : natural := 2; -- Number of input streams to be zipped
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g_nof_streams : natural := 2; -- Number of input streams to be zipped
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g_dat_w : natural := 8
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g_dat_w : natural := 8
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);
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);
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port (
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port (
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rst : in std_logic := '0';
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rst : in std_logic := '0';
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clk : in std_logic;
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clk : in std_logic;
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in_val : in std_logic := '0';
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in_val : in std_logic := '0';
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in_dat_arr : in t_slv_64_arr(g_nof_streams-1 downto 0);
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in_dat_arr : in t_slv_64_arr(g_nof_streams-1 downto 0);
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out_val : out std_logic;
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out_val : out std_logic;
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out_dat : out std_logic_vector(g_dat_w-1 downto 0)
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out_dat : out std_logic_vector(g_dat_w-1 downto 0)
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);
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);
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end common_zip;
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end common_zip;
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architecture rtl of common_zip is
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architecture rtl of common_zip is
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type t_dat_arr is array (natural range <>) of std_logic_vector(out_dat'range);
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type t_dat_arr is array (natural range <>) of std_logic_vector(out_dat'range);
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type reg_type is record
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type reg_type is record
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in_dat_arr : t_dat_arr(g_nof_streams-1 downto 1); -- Input register
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in_dat_arr : t_dat_arr(g_nof_streams-1 downto 1); -- Input register
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index : integer range 1 to g_nof_streams; -- Index
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index : integer range 1 to g_nof_streams; -- Index
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out_dat : std_logic_vector(g_dat_w-1 downto 0); -- Registered output value
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out_dat : std_logic_vector(g_dat_w-1 downto 0); -- Registered output value
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out_val : std_logic; -- Registered data valid signal
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out_val : std_logic; -- Registered data valid signal
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end record;
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end record;
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signal r, rin : reg_type;
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signal r, rin : reg_type;
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begin
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begin
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comb : process(r, rst, in_val, in_dat_arr)
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comb : process(r, rst, in_val, in_dat_arr)
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variable v : reg_type;
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variable v : reg_type;
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begin
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begin
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v := r;
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v := r;
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v.out_val := '0'; -- Default the output valid signal is low.
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v.out_val := '0'; -- Default the output valid signal is low.
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if(in_val = '1') then -- Wait for incoming data
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if(in_val = '1') then -- Wait for incoming data
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v.index := 1;
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v.index := 1;
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v.out_val := '1';
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v.out_val := '1';
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v.out_dat := in_dat_arr(0)(g_dat_w-1 downto 0); -- Output the first stream already
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v.out_dat := in_dat_arr(0)(g_dat_w-1 downto 0); -- Output the first stream already
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for I in 1 to g_nof_streams-1 loop
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for I in 1 to g_nof_streams-1 loop
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v.in_dat_arr(I) := in_dat_arr(I)(g_dat_w-1 downto 0); -- Store input data in register
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v.in_dat_arr(I) := in_dat_arr(I)(g_dat_w-1 downto 0); -- Store input data in register
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end loop;
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end loop;
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end if;
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end if;
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if(r.index < g_nof_streams) then
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if(r.index < g_nof_streams) then
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v.out_val := '1';
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v.out_val := '1';
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v.out_dat := r.in_dat_arr(r.index); -- Output the next input stream
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v.out_dat := r.in_dat_arr(r.index); -- Output the next input stream
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v.index := r.index+1;
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v.index := r.index+1;
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end if;
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end if;
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if(rst = '1') then
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if(rst = '1') then
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v.in_dat_arr := (others => (others => '0'));
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v.in_dat_arr := (others => (others => '0'));
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v.index := g_nof_streams;
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v.index := g_nof_streams;
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v.out_dat := (others => '0');
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v.out_dat := (others => '0');
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v.out_val := '0';
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v.out_val := '0';
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end if;
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end if;
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rin <= v;
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rin <= v;
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end process comb;
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end process comb;
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regs : process(clk)
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regs : process(clk)
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begin
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begin
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if rising_edge(clk) then
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if rising_edge(clk) then
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r <= rin;
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r <= rin;
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end if;
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end if;
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end process;
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end process;
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out_dat <= r.out_dat;
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out_dat <= r.out_dat;
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out_val <= r.out_val;
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out_val <= r.out_val;
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end rtl;
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end rtl;
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