-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Copyright (C) 2015
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-- Copyright 2020
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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--
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--
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-- This program is free software: you can redistribute it and/or modify
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-- Licensed under the Apache License, Version 2.0 (the "License");
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-- it under the terms of the GNU General Public License as published by
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-- you may not use this file except in compliance with the License.
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-- the Free Software Foundation, either version 3 of the License, or
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-- You may obtain a copy of the License at
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-- (at your option) any later version.
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--
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--
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-- This program is distributed in the hope that it will be useful,
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-- http://www.apache.org/licenses/LICENSE-2.0
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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--
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-- You should have received a copy of the GNU General Public License
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-- Unless required by applicable law or agreed to in writing, software
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.
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-- distributed under the License is distributed on an "AS IS" BASIS,
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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LIBRARY IEEE, common_pkg_lib, dp_pkg_lib;
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LIBRARY IEEE, common_pkg_lib, dp_pkg_lib;
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USE IEEE.std_logic_1164.all;
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USE IEEE.std_logic_1164.all;
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USE dp_pkg_lib.dp_stream_pkg.ALL;
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USE dp_pkg_lib.dp_stream_pkg.ALL;
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-- Purpose:
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-- Purpose:
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-- Pipeline array of g_nof_streams by g_pipeline cycles.
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-- Pipeline array of g_nof_streams by g_pipeline cycles.
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-- Description:
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-- Description:
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-- See dp_pipeline.
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-- See dp_pipeline.
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ENTITY dp_pipeline_arr IS
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ENTITY dp_pipeline_arr IS
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GENERIC (
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GENERIC (
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g_nof_streams : NATURAL := 1;
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g_nof_streams : NATURAL := 1;
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g_pipeline : NATURAL := 1 -- 0 for wires, > 0 for registers,
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g_pipeline : NATURAL := 1 -- 0 for wires, > 0 for registers,
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);
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);
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PORT (
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PORT (
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rst : IN STD_LOGIC;
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rst : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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-- ST sink
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-- ST sink
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snk_out_arr : OUT t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
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snk_out_arr : OUT t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
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snk_in_arr : IN t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
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snk_in_arr : IN t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
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-- ST source
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-- ST source
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src_in_arr : IN t_dp_siso_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS=>c_dp_siso_rdy);
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src_in_arr : IN t_dp_siso_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS=>c_dp_siso_rdy);
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src_out_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0)
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src_out_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0)
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);
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);
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END dp_pipeline_arr;
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END dp_pipeline_arr;
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ARCHITECTURE str OF dp_pipeline_arr IS
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ARCHITECTURE str OF dp_pipeline_arr IS
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BEGIN
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BEGIN
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gen_nof_streams : FOR I IN 0 TO g_nof_streams-1 GENERATE
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gen_nof_streams : FOR I IN 0 TO g_nof_streams-1 GENERATE
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u_p : ENTITY work.dp_pipeline
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u_p : ENTITY work.dp_pipeline
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GENERIC MAP (
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GENERIC MAP (
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g_pipeline => g_pipeline
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g_pipeline => g_pipeline
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)
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)
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PORT MAP (
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PORT MAP (
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rst => rst,
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rst => rst,
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clk => clk,
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clk => clk,
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-- ST sink
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-- ST sink
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snk_out => snk_out_arr(I),
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snk_out => snk_out_arr(I),
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snk_in => snk_in_arr(I),
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snk_in => snk_in_arr(I),
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-- ST source
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-- ST source
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src_in => src_in_arr(I),
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src_in => src_in_arr(I),
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src_out => src_out_arr(I)
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src_out => src_out_arr(I)
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);
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);
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END GENERATE;
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END GENERATE;
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END str;
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END str;
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