-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Copyright 2020
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-- Copyright 2020
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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--
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--
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-- Licensed under the Apache License, Version 2.0 (the "License");
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-- Licensed under the Apache License, Version 2.0 (the "License");
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-- you may not use this file except in compliance with the License.
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-- you may not use this file except in compliance with the License.
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-- You may obtain a copy of the License at
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-- You may obtain a copy of the License at
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--
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--
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-- http://www.apache.org/licenses/LICENSE-2.0
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-- http://www.apache.org/licenses/LICENSE-2.0
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--
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--
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-- Unless required by applicable law or agreed to in writing, software
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-- Unless required by applicable law or agreed to in writing, software
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-- distributed under the License is distributed on an "AS IS" BASIS,
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-- distributed under the License is distributed on an "AS IS" BASIS,
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- See the License for the specific language governing permissions and
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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-- limitations under the License.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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LIBRARY IEEE, common_pkg_lib, dp_pkg_lib, common_requantize_lib, dp_pipeline_lib;
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LIBRARY IEEE, common_pkg_lib, dp_pkg_lib, astron_pipeline_lib;
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USE IEEE.std_logic_1164.all;
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USE IEEE.std_logic_1164.all;
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USE dp_pkg_lib.dp_stream_pkg.ALL;
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USE dp_pkg_lib.dp_stream_pkg.ALL;
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--USE common_lib.all;
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--USE common_lib.all;
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USE common_pkg_lib.common_pkg.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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-- Purpose: Requantize the data in the re, im or data field of the sosi record.
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-- Purpose: Requantize the data in the re, im or data field of the sosi record.
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-- Description:
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-- Description:
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-- See common_requantize.vhd
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-- See common_requantize.vhd
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-- Remarks:
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-- Remarks:
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-- . It does not take into account the ready signal from the siso record.
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-- . It does not take into account the ready signal from the siso record.
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ENTITY dp_requantize IS
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ENTITY dp_requantize IS
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GENERIC (
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GENERIC (
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g_complex : BOOLEAN := TRUE; -- when true, the re and im field are processed, when false, the data field is processed
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g_complex : BOOLEAN := TRUE; -- when true, the re and im field are processed, when false, the data field is processed
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g_representation : STRING := "SIGNED"; -- SIGNED (round +-0.5 away from zero to +- infinity) or UNSIGNED rounding (round 0.5 up to + inifinity)
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g_representation : STRING := "SIGNED"; -- SIGNED (round +-0.5 away from zero to +- infinity) or UNSIGNED rounding (round 0.5 up to + inifinity)
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g_lsb_w : INTEGER := 4; -- when > 0, number of LSbits to remove from in_dat
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g_lsb_w : INTEGER := 4; -- when > 0, number of LSbits to remove from in_dat
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-- when < 0, number of LSBits to insert as a gain before resize to out_dat'LENGTH
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-- when < 0, number of LSBits to insert as a gain before resize to out_dat'LENGTH
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-- when 0 then no effect
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-- when 0 then no effect
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g_lsb_round : BOOLEAN := TRUE; -- when true ROUND else TRUNCATE the input LSbits
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g_lsb_round : BOOLEAN := TRUE; -- when true ROUND else TRUNCATE the input LSbits
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g_lsb_round_clip : BOOLEAN := FALSE; -- when true round clip to +max to avoid wrapping to output -min (signed) or 0 (unsigned) due to rounding
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g_lsb_round_clip : BOOLEAN := FALSE; -- when true round clip to +max to avoid wrapping to output -min (signed) or 0 (unsigned) due to rounding
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g_msb_clip : BOOLEAN := TRUE; -- when true CLIP else WRAP the input MSbits
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g_msb_clip : BOOLEAN := TRUE; -- when true CLIP else WRAP the input MSbits
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g_msb_clip_symmetric : BOOLEAN := FALSE; -- when TRUE clip signed symmetric to +c_smax and -c_smax, else to +c_smax and c_smin_symm
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g_msb_clip_symmetric : BOOLEAN := FALSE; -- when TRUE clip signed symmetric to +c_smax and -c_smax, else to +c_smax and c_smin_symm
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-- for wrapping when g_msb_clip=FALSE the g_msb_clip_symmetric is ignored, so signed wrapping is done asymmetric
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-- for wrapping when g_msb_clip=FALSE the g_msb_clip_symmetric is ignored, so signed wrapping is done asymmetric
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g_gain_w : NATURAL := 0; -- do not use, must be 0, use negative g_lsb_w instead
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g_gain_w : NATURAL := 0; -- do not use, must be 0, use negative g_lsb_w instead
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g_pipeline_remove_lsb : NATURAL := 0; -- >= 0
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g_pipeline_remove_lsb : NATURAL := 0; -- >= 0
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g_pipeline_remove_msb : NATURAL := 0; -- >= 0, use g_pipeline_remove_lsb=0 and g_pipeline_remove_msb=0 for combinatorial output
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g_pipeline_remove_msb : NATURAL := 0; -- >= 0, use g_pipeline_remove_lsb=0 and g_pipeline_remove_msb=0 for combinatorial output
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g_in_dat_w : NATURAL := 36; -- input data width
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g_in_dat_w : NATURAL := 36; -- input data width
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g_out_dat_w : NATURAL := 18 -- output data width
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g_out_dat_w : NATURAL := 18 -- output data width
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);
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);
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PORT (
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PORT (
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rst : IN STD_LOGIC;
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rst : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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-- ST sink
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-- ST sink
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snk_in : IN t_dp_sosi;
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snk_in : IN t_dp_sosi;
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-- ST source
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-- ST source
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src_out : OUT t_dp_sosi;
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src_out : OUT t_dp_sosi;
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--
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--
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out_ovr : OUT std_logic -- out_ovr is '1' when the removal of MSbits causes clipping or wrapping
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out_ovr : OUT std_logic -- out_ovr is '1' when the removal of MSbits causes clipping or wrapping
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);
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);
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END dp_requantize;
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END dp_requantize;
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ARCHITECTURE str OF dp_requantize IS
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ARCHITECTURE str OF dp_requantize IS
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CONSTANT c_pipeline : NATURAL := g_pipeline_remove_lsb + g_pipeline_remove_msb;
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CONSTANT c_pipeline : NATURAL := g_pipeline_remove_lsb + g_pipeline_remove_msb;
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SIGNAL snk_in_piped : t_dp_sosi;
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SIGNAL snk_in_piped : t_dp_sosi;
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SIGNAL quantized_data : STD_LOGIC_VECTOR(g_out_dat_w-1 DOWNTO 0);
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SIGNAL quantized_data : STD_LOGIC_VECTOR(g_out_dat_w-1 DOWNTO 0);
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SIGNAL quantized_re : STD_LOGIC_VECTOR(g_out_dat_w-1 DOWNTO 0);
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SIGNAL quantized_re : STD_LOGIC_VECTOR(g_out_dat_w-1 DOWNTO 0);
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SIGNAL quantized_im : STD_LOGIC_VECTOR(g_out_dat_w-1 DOWNTO 0);
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SIGNAL quantized_im : STD_LOGIC_VECTOR(g_out_dat_w-1 DOWNTO 0);
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SIGNAL out_ovr_re : STD_LOGIC;
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SIGNAL out_ovr_re : STD_LOGIC;
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SIGNAL out_ovr_im : STD_LOGIC;
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SIGNAL out_ovr_im : STD_LOGIC;
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BEGIN
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BEGIN
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ASSERT g_gain_w=0 REPORT "dp_requantize: must use g_gain_w = 0, because gain is now supported via negative g_lsb_w." SEVERITY FAILURE;
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ASSERT g_gain_w=0 REPORT "dp_requantize: must use g_gain_w = 0, because gain is now supported via negative g_lsb_w." SEVERITY FAILURE;
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---------------------------------------------------------------
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---------------------------------------------------------------
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-- Requantize the sosi data field
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-- Requantize the sosi data field
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---------------------------------------------------------------
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---------------------------------------------------------------
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gen_requantize_data : IF g_complex=FALSE GENERATE
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gen_requantize_data : IF g_complex=FALSE GENERATE
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u_requantize_data : ENTITY common_requantize_lib.common_requantize
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u_requantize_data : ENTITY work.common_requantize
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GENERIC MAP (
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GENERIC MAP (
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g_representation => g_representation,
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g_representation => g_representation,
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g_lsb_w => g_lsb_w,
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g_lsb_w => g_lsb_w,
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g_lsb_round => g_lsb_round,
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g_lsb_round => g_lsb_round,
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g_lsb_round_clip => g_lsb_round_clip,
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g_lsb_round_clip => g_lsb_round_clip,
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g_msb_clip => g_msb_clip,
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g_msb_clip => g_msb_clip,
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g_msb_clip_symmetric => g_msb_clip_symmetric,
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g_msb_clip_symmetric => g_msb_clip_symmetric,
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g_pipeline_remove_lsb => g_pipeline_remove_lsb,
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g_pipeline_remove_lsb => g_pipeline_remove_lsb,
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g_pipeline_remove_msb => g_pipeline_remove_msb,
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g_pipeline_remove_msb => g_pipeline_remove_msb,
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g_in_dat_w => g_in_dat_w,
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g_in_dat_w => g_in_dat_w,
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g_out_dat_w => g_out_dat_w
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g_out_dat_w => g_out_dat_w
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)
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)
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PORT MAP (
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PORT MAP (
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clk => clk,
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clk => clk,
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in_dat => snk_in.data,
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in_dat => snk_in.data,
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out_dat => quantized_data,
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out_dat => quantized_data,
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out_ovr => out_ovr
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out_ovr => out_ovr
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);
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);
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END GENERATE;
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END GENERATE;
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---------------------------------------------------------------
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---------------------------------------------------------------
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-- Requantize the sosi complex fields
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-- Requantize the sosi complex fields
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---------------------------------------------------------------
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---------------------------------------------------------------
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gen_requantize_complex : IF g_complex=TRUE GENERATE
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gen_requantize_complex : IF g_complex=TRUE GENERATE
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u_requantize_re: ENTITY common_requantize_lib.common_requantize
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u_requantize_re: ENTITY work.common_requantize
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GENERIC MAP (
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GENERIC MAP (
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g_representation => g_representation,
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g_representation => g_representation,
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g_lsb_w => g_lsb_w,
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g_lsb_w => g_lsb_w,
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g_lsb_round => g_lsb_round,
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g_lsb_round => g_lsb_round,
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g_lsb_round_clip => g_lsb_round_clip,
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g_lsb_round_clip => g_lsb_round_clip,
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g_msb_clip => g_msb_clip,
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g_msb_clip => g_msb_clip,
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g_msb_clip_symmetric => g_msb_clip_symmetric,
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g_msb_clip_symmetric => g_msb_clip_symmetric,
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g_pipeline_remove_lsb => g_pipeline_remove_lsb,
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g_pipeline_remove_lsb => g_pipeline_remove_lsb,
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g_pipeline_remove_msb => g_pipeline_remove_msb,
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g_pipeline_remove_msb => g_pipeline_remove_msb,
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g_in_dat_w => g_in_dat_w,
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g_in_dat_w => g_in_dat_w,
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g_out_dat_w => g_out_dat_w
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g_out_dat_w => g_out_dat_w
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)
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)
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PORT MAP (
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PORT MAP (
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clk => clk,
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clk => clk,
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in_dat => snk_in.re,
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in_dat => snk_in.re,
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out_dat => quantized_re,
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out_dat => quantized_re,
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out_ovr => out_ovr_re
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out_ovr => out_ovr_re
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);
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);
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u_requantize_im: ENTITY common_requantize_lib.common_requantize
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u_requantize_im: ENTITY work.common_requantize
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GENERIC MAP (
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GENERIC MAP (
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g_representation => g_representation,
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g_representation => g_representation,
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g_lsb_w => g_lsb_w,
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g_lsb_w => g_lsb_w,
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g_lsb_round => g_lsb_round,
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g_lsb_round => g_lsb_round,
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g_lsb_round_clip => g_lsb_round_clip,
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g_lsb_round_clip => g_lsb_round_clip,
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g_msb_clip => g_msb_clip,
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g_msb_clip => g_msb_clip,
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g_msb_clip_symmetric => g_msb_clip_symmetric,
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g_msb_clip_symmetric => g_msb_clip_symmetric,
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g_pipeline_remove_lsb => g_pipeline_remove_lsb,
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g_pipeline_remove_lsb => g_pipeline_remove_lsb,
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g_pipeline_remove_msb => g_pipeline_remove_msb,
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g_pipeline_remove_msb => g_pipeline_remove_msb,
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g_in_dat_w => g_in_dat_w,
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g_in_dat_w => g_in_dat_w,
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g_out_dat_w => g_out_dat_w
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g_out_dat_w => g_out_dat_w
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)
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)
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PORT MAP (
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PORT MAP (
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clk => clk,
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clk => clk,
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in_dat => snk_in.im,
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in_dat => snk_in.im,
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out_dat => quantized_im,
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out_dat => quantized_im,
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out_ovr => out_ovr_im
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out_ovr => out_ovr_im
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);
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);
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out_ovr <= out_ovr_re OR out_ovr_im;
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out_ovr <= out_ovr_re OR out_ovr_im;
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END GENERATE;
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END GENERATE;
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--------------------------------------------------------------
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--------------------------------------------------------------
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-- Pipeline to align the other sosi fields
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-- Pipeline to align the other sosi fields
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--------------------------------------------------------------
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--------------------------------------------------------------
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u_dp_pipeline : ENTITY dp_pipeline_lib.dp_pipeline
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u_dp_pipeline : ENTITY astron_pipeline_lib.dp_pipeline
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GENERIC MAP (
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GENERIC MAP (
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g_pipeline => c_pipeline -- 0 for wires, > 0 for registers,
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g_pipeline => c_pipeline -- 0 for wires, > 0 for registers,
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)
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)
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PORT MAP (
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PORT MAP (
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rst => rst,
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rst => rst,
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clk => clk,
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clk => clk,
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-- ST sink
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-- ST sink
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snk_in => snk_in,
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snk_in => snk_in,
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-- ST source
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-- ST source
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src_out => snk_in_piped
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src_out => snk_in_piped
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);
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);
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PROCESS(snk_in_piped, quantized_data, quantized_re, quantized_im)
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PROCESS(snk_in_piped, quantized_data, quantized_re, quantized_im)
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BEGIN
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BEGIN
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src_out <= snk_in_piped;
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src_out <= snk_in_piped;
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IF g_complex=FALSE THEN
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IF g_complex=FALSE THEN
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IF g_representation="UNSIGNED" THEN
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IF g_representation="UNSIGNED" THEN
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src_out.data <= RESIZE_DP_DATA( quantized_data);
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src_out.data <= RESIZE_DP_DATA( quantized_data);
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ELSE
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ELSE
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src_out.data <= RESIZE_DP_SDATA(quantized_data);
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src_out.data <= RESIZE_DP_SDATA(quantized_data);
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END IF;
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END IF;
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ELSE
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ELSE
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src_out.re <= RESIZE_DP_DSP_DATA(quantized_re);
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src_out.re <= RESIZE_DP_DSP_DATA(quantized_re);
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src_out.im <= RESIZE_DP_DSP_DATA(quantized_im);
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src_out.im <= RESIZE_DP_DSP_DATA(quantized_im);
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END IF;
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END IF;
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END PROCESS;
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END PROCESS;
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END str;
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END str;
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