/*
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/*
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Asynchronous SDM NoC
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Asynchronous SDM NoC
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(C)2011 Wei Song
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(C)2011 Wei Song
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Advanced Processor Technologies Group
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Advanced Processor Technologies Group
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Computer Science, the Univ. of Manchester, UK
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Computer Science, the Univ. of Manchester, UK
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Authors:
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Authors:
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Wei Song wsong83@gmail.com
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Wei Song wsong83@gmail.com
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License: LGPL 3.0 or later
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License: LGPL 3.0 or later
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Demux for a 1-of-n buffer stage.
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Demux for a 1-of-n buffer stage.
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History:
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History:
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31/03/2010 Initial version. <wsong83@gmail.com>
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31/03/2010 Initial version. <wsong83@gmail.com>
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02/06/2011 Clean up for opensource. <wsong83@gmail.com>
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02/06/2011 Clean up for opensource. <wsong83@gmail.com>
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09/06/2011 Make sure the sel pin is considered in the ack process. <wsong83@gmail.com>
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*/
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*/
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module ddmux ( /*AUTOARG*/
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module ddmux ( /*AUTOARG*/
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// Outputs
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// Outputs
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d_in_a, d_out,
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d_in_a, d_out,
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// Inputs
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// Inputs
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d_in, d_sel, d_out_a
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d_in, d_sel, d_out_a
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);
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);
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parameter VCN = 2; // number of output VCs
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parameter VCN = 2; // number of output VCs
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parameter DW = 32; // data width of the input
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parameter DW = 32; // data width of the input
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input [DW-1:0] d_in;
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input [DW-1:0] d_in;
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input [VCN-1:0] d_sel;
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input [VCN-1:0] d_sel;
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output d_in_a;
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output d_in_a;
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output [VCN-1:0][DW-1:0] d_out;
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output [VCN-1:0][DW-1:0] d_out;
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input [VCN-1:0] d_out_a;
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input [VCN-1:0] d_out_a;
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genvar i,j;
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genvar i,j;
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/*
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/*
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generate
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generate
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for (i=0; i<VCN; i++) begin: VCD
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for (i=0; i<VCN; i++) begin: VCD
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for(j=0; j<DW; j++) begin: D
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for(j=0; j<DW; j++) begin: D
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c2 C (.a0(d_in[j]), .a1(d_sel[i]), .q(d_out[i][j]));
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c2 C (.a0(d_in[j]), .a1(d_sel[i]), .q(d_out[i][j]));
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end
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end
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end
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end
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endgenerate
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endgenerate
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*/
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*/
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generate
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generate
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for (i=0; i<VCN; i++) begin: VCD
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for (i=0; i<VCN; i++) begin: VCD
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assign d_out[i] = d_sel[i] ? d_in : 0;
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assign d_out[i] = d_sel[i] ? d_in : 0;
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end
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end
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endgenerate
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endgenerate
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assign d_in_a = |d_out_a;
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//assign d_in_a = |d_out_a;
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c2 CACK (.a0(|d_out_a), .a1(|d_sel), .q(d_in_a));
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endmodule // ddmux
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endmodule // ddmux
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