/////////////////////////////////////////////////////////////////////
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<##//////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Author: Eyal Hochberg ////
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//// Author: Eyal Hochberg ////
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//// eyal@provartec.com ////
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//// eyal@provartec.com ////
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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org ////
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//// Downloaded from: http://www.opencores.org ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2010 Provartec LTD ////
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//// Copyright (C) 2010 Provartec LTD ////
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//// www.provartec.com ////
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//// www.provartec.com ////
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//// info@provartec.com ////
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//// info@provartec.com ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation.////
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//// Public License as published by the Free Software Foundation.////
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//// ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more////
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//// PURPOSE. See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html ////
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//// details. http://www.gnu.org/licenses/lgpl.html ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////##>
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OUTFILE PREFIX_ram.v
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OUTFILE PREFIX_ram.v
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INCLUDE def_axi_slave.txt
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INCLUDE def_axi_slave.txt
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module PREFIX_ram(PORTS);
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module PREFIX_ram(PORTS);
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input clk;
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input clk;
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input reset;
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input reset;
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revport GROUP_STUB_AXI;
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revport GROUP_STUB_AXI;
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port GROUP_STUB_MEM;
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port GROUP_STUB_MEM;
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//busy
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//busy
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wire ARBUSY;
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wire ARBUSY;
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wire RBUSY;
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wire RBUSY;
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wire AWBUSY;
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wire AWBUSY;
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wire WBUSY;
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wire WBUSY;
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wire BBUSY;
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wire BBUSY;
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//wcmd fifo
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//wcmd fifo
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wire [ADDR_BITS-1:0] wcmd_addr;
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wire [ADDR_BITS-1:0] wcmd_addr;
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wire [ID_BITS-1:0] wcmd_id;
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wire [ID_BITS-1:0] wcmd_id;
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wire [SIZE_BITS-1:0] wcmd_size;
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wire [SIZE_BITS-1:0] wcmd_size;
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wire [LEN_BITS-1:0] wcmd_len;
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wire [LEN_BITS-1:0] wcmd_len;
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wire [1:0] wcmd_resp;
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wire [1:0] wcmd_resp;
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wire wcmd_timeout;
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wire wcmd_timeout;
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wire wcmd_ready;
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wire wcmd_ready;
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wire wcmd_empty;
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wire wcmd_empty;
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wire wcmd_full;
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wire wcmd_full;
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//rcmd fifo
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//rcmd fifo
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wire [ADDR_BITS-1:0] rcmd_addr;
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wire [ADDR_BITS-1:0] rcmd_addr;
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wire [ID_BITS-1:0] rcmd_id;
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wire [ID_BITS-1:0] rcmd_id;
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wire [SIZE_BITS-1:0] rcmd_size;
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wire [SIZE_BITS-1:0] rcmd_size;
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wire [LEN_BITS-1:0] rcmd_len;
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wire [LEN_BITS-1:0] rcmd_len;
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wire [1:0] rcmd_resp;
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wire [1:0] rcmd_resp;
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wire rcmd_timeout;
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wire rcmd_timeout;
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wire rcmd_ready;
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wire rcmd_ready;
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wire rcmd_empty;
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wire rcmd_empty;
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wire rcmd_full;
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wire rcmd_full;
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wire [ID_BITS-1:0] rcmd_id2;
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wire [ID_BITS-1:0] rcmd_id2;
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wire [LEN_BITS-1:0] rcmd_len2;
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wire [LEN_BITS-1:0] rcmd_len2;
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wire wresp_empty;
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wire wresp_empty;
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wire wresp_pending;
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wire wresp_pending;
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wire wresp_timeout;
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wire wresp_timeout;
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reg [ADDR_BITS-1:0] TIMEOUT_AR_addr = {ADDR_BITS{1'b1}};
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reg [ADDR_BITS-1:0] TIMEOUT_AR_addr = {ADDR_BITS{1'b1}};
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reg [ADDR_BITS-1:0] TIMEOUT_AW_addr = {ADDR_BITS{1'b1}};
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reg [ADDR_BITS-1:0] TIMEOUT_AW_addr = {ADDR_BITS{1'b1}};
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wire AR_stall = ARVALID & (TIMEOUT_AR_addr == ARADDR);
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wire AR_stall = ARVALID & (TIMEOUT_AR_addr == ARADDR);
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wire AW_stall = AWVALID & (TIMEOUT_AW_addr == AWADDR);
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wire AW_stall = AWVALID & (TIMEOUT_AW_addr == AWADDR);
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wire RD_last;
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wire RD_last;
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assign RID = rcmd_id2;
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assign RID = rcmd_id2;
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//give ready only after VALID comes
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//give ready only after VALID comes
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assign ARREADY = ((~rcmd_full) & (~AR_stall) & (~ARBUSY)) & ARVALID;
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assign ARREADY = ((~rcmd_full) & (~AR_stall) & (~ARBUSY)) & ARVALID;
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assign AWREADY = ((~wcmd_full) & (~AW_stall) & (~AWBUSY)) & AWVALID;
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assign AWREADY = ((~wcmd_full) & (~AW_stall) & (~AWBUSY)) & AWVALID;
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// assign ARREADY = ((~rcmd_full) & (~AR_stall) & (~ARBUSY)) || (~ARVALID);
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// assign ARREADY = ((~rcmd_full) & (~AR_stall) & (~ARBUSY)) || (~ARVALID);
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// assign AWREADY = ((~wcmd_full) & (~AW_stall) & (~AWBUSY)) || (~AWVALID);
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// assign AWREADY = ((~wcmd_full) & (~AW_stall) & (~AWBUSY)) || (~AWVALID);
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assign BVALID = (~wresp_timeout) & (wresp_pending ? (~wresp_empty) : (~wresp_empty) & (~BBUSY));
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assign BVALID = (~wresp_timeout) & (wresp_pending ? (~wresp_empty) : (~wresp_empty) & (~BBUSY));
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CREATE axi_slave_busy.v
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CREATE axi_slave_busy.v
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PREFIX_busy
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PREFIX_busy
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PREFIX_busy (
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PREFIX_busy (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.ARBUSY(ARBUSY),
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.ARBUSY(ARBUSY),
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.RBUSY(RBUSY),
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.RBUSY(RBUSY),
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.AWBUSY(AWBUSY),
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.AWBUSY(AWBUSY),
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.WBUSY(WBUSY),
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.WBUSY(WBUSY),
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.BBUSY(BBUSY)
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.BBUSY(BBUSY)
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);
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);
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CREATE axi_slave_cmd_fifo.v
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CREATE axi_slave_cmd_fifo.v
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PREFIX_cmd_fifo #(WCMD_DEPTH)
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PREFIX_cmd_fifo #(WCMD_DEPTH)
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PREFIX_wcmd_fifo (
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PREFIX_wcmd_fifo (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.AADDR(AWADDR),
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.AADDR(AWADDR),
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.AID(AWID),
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.AID(AWID),
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.ASIZE(AWSIZE),
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.ASIZE(AWSIZE),
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.ALEN(AWLEN),
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.ALEN(AWLEN),
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.AVALID(AWVALID),
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.AVALID(AWVALID),
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.AREADY(AWREADY),
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.AREADY(AWREADY),
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.VALID(WVALID),
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.VALID(WVALID),
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.READY(WREADY),
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.READY(WREADY),
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.LAST(WLAST),
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.LAST(WLAST),
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.cmd_addr(wcmd_addr),
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.cmd_addr(wcmd_addr),
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.cmd_id(wcmd_id), //not used
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.cmd_id(wcmd_id), //not used
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.cmd_size(wcmd_size),
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.cmd_size(wcmd_size),
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.cmd_len(wcmd_len), //not used
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.cmd_len(wcmd_len), //not used
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.cmd_resp(),
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.cmd_resp(),
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.cmd_timeout(wcmd_timeout),
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.cmd_timeout(wcmd_timeout),
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.cmd_ready(wcmd_ready),
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.cmd_ready(wcmd_ready),
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.cmd_empty(wcmd_empty),
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.cmd_empty(wcmd_empty),
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.cmd_full(wcmd_full)
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.cmd_full(wcmd_full)
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);
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);
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PREFIX_cmd_fifo #(RCMD_DEPTH)
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PREFIX_cmd_fifo #(RCMD_DEPTH)
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PREFIX_rcmd_fifo (
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PREFIX_rcmd_fifo (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.AADDR(ARADDR),
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.AADDR(ARADDR),
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.AID(ARID),
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.AID(ARID),
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.ASIZE(ARSIZE),
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.ASIZE(ARSIZE),
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.ALEN(ARLEN),
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.ALEN(ARLEN),
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.AVALID(ARVALID),
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.AVALID(ARVALID),
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.AREADY(ARREADY),
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.AREADY(ARREADY),
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.VALID(RD_last),
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.VALID(RD_last),
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.READY(1'b1),
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.READY(1'b1),
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.LAST(1'b1),
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.LAST(1'b1),
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.cmd_addr(rcmd_addr),
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.cmd_addr(rcmd_addr),
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.cmd_id(rcmd_id),
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.cmd_id(rcmd_id),
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.cmd_size(rcmd_size),
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.cmd_size(rcmd_size),
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.cmd_len(rcmd_len),
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.cmd_len(rcmd_len),
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.cmd_resp(rcmd_resp),
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.cmd_resp(rcmd_resp),
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.cmd_timeout(rcmd_timeout),
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.cmd_timeout(rcmd_timeout),
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.cmd_ready(rcmd_ready),
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.cmd_ready(rcmd_ready),
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.cmd_empty(),
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.cmd_empty(),
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.cmd_full()
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.cmd_full()
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);
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);
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PREFIX_cmd_fifo #(RCMD_DEPTH)
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PREFIX_cmd_fifo #(RCMD_DEPTH)
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PREFIX_rcmd_fifo2 (
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PREFIX_rcmd_fifo2 (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.AADDR(ARADDR),
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.AADDR(ARADDR),
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.AID(ARID),
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.AID(ARID),
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.ASIZE(ARSIZE),
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.ASIZE(ARSIZE),
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.ALEN(ARLEN),
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.ALEN(ARLEN),
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.AVALID(ARVALID),
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.AVALID(ARVALID),
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.AREADY(ARREADY),
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.AREADY(ARREADY),
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.VALID(RVALID),
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.VALID(RVALID),
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.READY(RREADY),
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.READY(RREADY),
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.LAST(RLAST),
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.LAST(RLAST),
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.cmd_addr(),
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.cmd_addr(),
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.cmd_id(rcmd_id2),
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.cmd_id(rcmd_id2),
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.cmd_size(),
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.cmd_size(),
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.cmd_len(rcmd_len2),
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.cmd_len(rcmd_len2),
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.cmd_resp(),
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.cmd_resp(),
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.cmd_timeout(),
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.cmd_timeout(),
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.cmd_ready(),
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.cmd_ready(),
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.cmd_empty(rcmd_empty),
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.cmd_empty(rcmd_empty),
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.cmd_full(rcmd_full)
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.cmd_full(rcmd_full)
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);
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);
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CREATE axi_slave_wresp_fifo.v
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CREATE axi_slave_wresp_fifo.v
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PREFIX_wresp_fifo #(WCMD_DEPTH)
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PREFIX_wresp_fifo #(WCMD_DEPTH)
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PREFIX_wresp_fifo (
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PREFIX_wresp_fifo (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.AWVALID(AWVALID),
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.AWVALID(AWVALID),
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.AWREADY(AWREADY),
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.AWREADY(AWREADY),
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.AWADDR(AWADDR),
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.AWADDR(AWADDR),
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.WVALID(WVALID),
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.WVALID(WVALID),
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.WREADY(WREADY),
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.WREADY(WREADY),
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.WLAST(WLAST),
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.WLAST(WLAST),
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.WID(WID),
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.WID(WID),
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.BID(BID),
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.BID(BID),
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.BRESP(BRESP),
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.BRESP(BRESP),
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.BVALID(BVALID),
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.BVALID(BVALID),
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.BREADY(BREADY),
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.BREADY(BREADY),
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.empty(wresp_empty),
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.empty(wresp_empty),
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.pending(wresp_pending),
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.pending(wresp_pending),
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.timeout(wresp_timeout)
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.timeout(wresp_timeout)
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);
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);
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CREATE axi_slave_addr_gen.v
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CREATE axi_slave_addr_gen.v
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PREFIX_addr_gen
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PREFIX_addr_gen
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PREFIX_addr_gen_wr (
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PREFIX_addr_gen_wr (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.cmd_addr(wcmd_addr),
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.cmd_addr(wcmd_addr),
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.cmd_size(wcmd_size),
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.cmd_size(wcmd_size),
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.advance(WVALID & WREADY & (~WLAST)),
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.advance(WVALID & WREADY & (~WLAST)),
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.restart(WVALID & WREADY & WLAST),
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.restart(WVALID & WREADY & WLAST),
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.ADDR(ADDR_WR)
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.ADDR(ADDR_WR)
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);
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);
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PREFIX_addr_gen
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PREFIX_addr_gen
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PREFIX_addr_gen_rd (
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PREFIX_addr_gen_rd (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.cmd_addr(rcmd_addr),
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.cmd_addr(rcmd_addr),
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.cmd_size(rcmd_size),
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.cmd_size(rcmd_size),
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.advance(RD),
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.advance(RD),
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.restart(RD_last),
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.restart(RD_last),
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.ADDR(ADDR_RD)
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.ADDR(ADDR_RD)
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);
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);
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CREATE axi_slave_rd_buff.v
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CREATE axi_slave_rd_buff.v
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PREFIX_rd_buff
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PREFIX_rd_buff
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PREFIX_rd_buff(
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PREFIX_rd_buff(
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.RD(RD),
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.RD(RD),
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.DOUT(DOUT),
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.DOUT(DOUT),
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.rcmd_len(rcmd_len),
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.rcmd_len(rcmd_len),
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.rcmd_len2(rcmd_len2),
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.rcmd_len2(rcmd_len2),
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.rcmd_resp(rcmd_resp),
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.rcmd_resp(rcmd_resp),
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.rcmd_timeout(rcmd_timeout),
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.rcmd_timeout(rcmd_timeout),
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.rcmd_ready(rcmd_ready),
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.rcmd_ready(rcmd_ready),
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.RVALID(RVALID),
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.RVALID(RVALID),
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.RREADY(RREADY),
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.RREADY(RREADY),
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.RLAST(RLAST),
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.RLAST(RLAST),
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.RDATA(RDATA),
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.RDATA(RDATA),
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.RD_last(RD_last),
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.RD_last(RD_last),
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.RRESP(RRESP),
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.RRESP(RRESP),
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.RBUSY(RBUSY)
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.RBUSY(RBUSY)
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);
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);
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//wr_buff
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//wr_buff
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assign WREADY = (~wcmd_timeout) & (~wcmd_empty) & (~WBUSY) & WVALID;
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assign WREADY = (~wcmd_timeout) & (~wcmd_empty) & (~WBUSY) & WVALID;
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assign WR = WVALID & WREADY & (~wcmd_empty);
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assign WR = WVALID & WREADY & (~wcmd_empty);
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assign DIN = WDATA;
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assign DIN = WDATA;
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assign BSEL = WSTRB;
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assign BSEL = WSTRB;
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endmodule
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endmodule
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