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https://opencores.org/ocsvn/bu_pacman/bu_pacman/trunk
[/] [bu_pacman/] [tags/] [arelease/] [test_memory.unroutes] - Diff between revs 3 and 4
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Rev 3 |
Rev 4 |
Release 10.1 - par K.31 (nt)
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Release 10.1 - par K.31 (nt)
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Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
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Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
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Thu Nov 20 21:07:50 2008
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Thu Nov 20 21:07:50 2008
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All signals are completely routed.
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All signals are completely routed.
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WARNING:ParHelpers:361 - There are 2 loadless signals in this design. This design will cause Bitgen to issue DRC
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WARNING:ParHelpers:361 - There are 2 loadless signals in this design. This design will cause Bitgen to issue DRC
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warnings.
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warnings.
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clk_IBUF
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clk_IBUF
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reset_IBUF
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reset_IBUF
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