-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Copyright (C) 2009
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-- Copyright 2020
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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--
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--
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-- This program is free software: you can redistribute it and/or modify
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-- Licensed under the Apache License, Version 2.0 (the "License");
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-- it under the terms of the GNU General Public License as published by
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-- you may not use this file except in compliance with the License.
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-- the Free Software Foundation, either version 3 of the License, or
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-- You may obtain a copy of the License at
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-- (at your option) any later version.
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--
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--
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-- This program is distributed in the hope that it will be useful,
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-- http://www.apache.org/licenses/LICENSE-2.0
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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--
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-- You should have received a copy of the GNU General Public License
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-- Unless required by applicable law or agreed to in writing, software
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.
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-- distributed under the License is distributed on an "AS IS" BASIS,
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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LIBRARY IEEE, common_pkg_lib;
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LIBRARY IEEE, common_pkg_lib;
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USE IEEE.std_logic_1164.ALL;
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USE IEEE.std_logic_1164.ALL;
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USE IEEE.numeric_std.ALL;
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USE IEEE.numeric_std.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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USE common_pkg_lib.common_pkg.ALL;
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ENTITY common_pipeline_sl IS
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ENTITY common_pipeline_sl IS
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GENERIC (
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GENERIC (
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g_pipeline : NATURAL := 1; -- 0 for wires, > 0 for registers,
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g_pipeline : NATURAL := 1; -- 0 for wires, > 0 for registers,
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g_reset_value : NATURAL := 0; -- 0 or 1, bit reset value,
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g_reset_value : NATURAL := 0; -- 0 or 1, bit reset value,
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g_out_invert : BOOLEAN := FALSE
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g_out_invert : BOOLEAN := FALSE
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);
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);
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PORT (
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PORT (
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rst : IN STD_LOGIC := '0';
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rst : IN STD_LOGIC := '0';
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clk : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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clken : IN STD_LOGIC := '1';
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clken : IN STD_LOGIC := '1';
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in_clr : IN STD_LOGIC := '0';
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in_clr : IN STD_LOGIC := '0';
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in_en : IN STD_LOGIC := '1';
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in_en : IN STD_LOGIC := '1';
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in_dat : IN STD_LOGIC;
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in_dat : IN STD_LOGIC;
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out_dat : OUT STD_LOGIC
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out_dat : OUT STD_LOGIC
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);
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);
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END common_pipeline_sl;
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END common_pipeline_sl;
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ARCHITECTURE str OF common_pipeline_sl IS
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ARCHITECTURE str OF common_pipeline_sl IS
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SIGNAL in_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
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SIGNAL in_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
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SIGNAL out_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
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SIGNAL out_dat_slv : STD_LOGIC_VECTOR(0 DOWNTO 0);
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BEGIN
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BEGIN
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in_dat_slv(0) <= in_dat WHEN g_out_invert=FALSE ELSE NOT in_dat;
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in_dat_slv(0) <= in_dat WHEN g_out_invert=FALSE ELSE NOT in_dat;
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out_dat <= out_dat_slv(0);
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out_dat <= out_dat_slv(0);
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u_sl : ENTITY work.common_pipeline
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u_sl : ENTITY work.common_pipeline
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GENERIC MAP (
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GENERIC MAP (
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g_representation => "UNSIGNED",
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g_representation => "UNSIGNED",
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g_pipeline => g_pipeline,
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g_pipeline => g_pipeline,
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g_reset_value => sel_a_b(g_out_invert, 1-g_reset_value, g_reset_value),
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g_reset_value => sel_a_b(g_out_invert, 1-g_reset_value, g_reset_value),
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g_in_dat_w => 1,
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g_in_dat_w => 1,
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g_out_dat_w => 1
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g_out_dat_w => 1
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)
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)
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PORT MAP (
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PORT MAP (
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rst => rst,
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rst => rst,
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clk => clk,
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clk => clk,
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clken => clken,
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clken => clken,
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in_clr => in_clr,
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in_clr => in_clr,
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in_en => in_en,
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in_en => in_en,
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in_dat => in_dat_slv,
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in_dat => in_dat_slv,
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out_dat => out_dat_slv
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out_dat => out_dat_slv
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);
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);
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END str;
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END str;
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