library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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USE ieee.std_logic_arith.ALL;
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USE ieee.std_logic_arith.ALL;
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entity AI is
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entity AI is
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port(
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port(
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iAI_start:in std_logic;
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iAI_start:in std_logic;
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iAI_DATA: in std_logic_vector(63 downto 0);
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iAI_DATA: in std_logic_vector(63 downto 0);
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iCOLOR:in std_logic_vector(7 downto 0);
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iCOLOR:in std_logic_vector(7 downto 0);
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imovecount:in std_logic_vector(16 downto 0);
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imovecount:in std_logic_vector(16 downto 0);
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oAI_Done: out std_logic;
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oAI_Done: out std_logic;
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oAI_DATA: out std_logic_vector(63 downto 0);
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oAI_DATA: out std_logic_vector(63 downto 0);
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iCLK: in std_logic;
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iCLK: in std_logic;
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iRST_n:in std_logic
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iRST_n:in std_logic
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);
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);
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end entity AI;
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end entity AI;
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architecture c_to_g of AI is
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architecture c_to_g of AI is
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component bram_based_stream_buffer is
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--#(.width(48), .depth(`CONNECT6AI_SYNTH_ILS_FIFO_QUEUE_DISMANTLE_LENGTH))
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port(
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clk:in std_logic;
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reset:in std_logic;
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store_ready:in std_logic;
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flush:in std_logic;
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store_req:out std_logic;
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load_req:out std_logic;
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load_ready:in std_logic;
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indata:in std_logic_vector(47 downto 0);
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outdata:out std_logic_vector(47 downto 0)
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);
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end component bram_based_stream_buffer;
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component connect6ai_synth_tcab is
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component connect6ai_synth_tcab is
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port(
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port(
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clk: in std_logic;
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clk: in std_logic;
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reset:in std_logic;
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reset:in std_logic;
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stallbar_out:out std_logic;
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stallbar_out:out std_logic;
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rawdataout_pico_ret_connect6ai_synth_0_outenable:out std_logic;
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rawdataout_pico_ret_connect6ai_synth_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_0_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_0_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_1_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_1_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_2_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_2_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_3_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_3_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_4_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_4_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_5_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_5_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_6_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_6_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_7_0_outenable:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_7_0_outenable:out std_logic;
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start:in std_logic;
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start:in std_logic;
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rawdatain_pico_connect6ai_synth_firstmove_in_0_0:in std_logic_vector(16 downto 0);
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rawdatain_pico_connect6ai_synth_firstmove_in_0_0:in std_logic_vector(16 downto 0);
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rawdatain_pico_connect6ai_synth_movein_0_in_1_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_0_in_1_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_1_in_2_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_1_in_2_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_2_in_3_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_2_in_3_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_3_in_4_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_3_in_4_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_4_in_5_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_4_in_5_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_5_in_6_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_5_in_6_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_6_in_7_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_6_in_7_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_7_in_8_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_movein_7_in_8_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_colour_in_9_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_colour_in_9_0:in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_0_in_10_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_0_in_10_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_1_in_11_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_1_in_11_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_2_in_12_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_2_in_12_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_3_in_13_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_3_in_13_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_4_in_14_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_4_in_14_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_5_in_15_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_5_in_15_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_6_in_16_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_6_in_16_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_7_in_17_0: in std_logic_vector(7 downto 0);
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rawdatain_pico_connect6ai_synth_moveout_7_in_17_0: in std_logic_vector(7 downto 0);
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rawdataout_pico_ret_connect6ai_synth_0:out std_logic;
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rawdataout_pico_ret_connect6ai_synth_0:out std_logic;
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rawdataout_pico_connect6ai_synth_moveout_out_0_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_0_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_1_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_1_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_2_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_2_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_3_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_3_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_4_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_4_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_5_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_5_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_6_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_6_0: out std_logic_vector(7 downto 0);
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rawdataout_pico_connect6ai_synth_moveout_out_7_0: out std_logic_vector(7 downto 0)
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rawdataout_pico_connect6ai_synth_moveout_out_7_0: out std_logic_vector(7 downto 0);
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instream_queue_di_0:in std_logic_vector(47 downto 0);
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instream_queue_req_0:out std_logic;
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instream_queue_ready_0:in std_logic;
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outstream_queue_do_1:out std_logic_vector(47 downto 0);
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outstream_queue_req_1:out std_logic;
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outstream_queue_ready_1:in std_logic
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);
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);
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end component connect6ai_synth_tcab;
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end component connect6ai_synth_tcab;
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signal out_enables:std_logic_vector(7 downto 0);
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signal out_enables:std_logic_vector(7 downto 0);
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signal out_enables_reg:std_logic_vector(7 downto 0);
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signal out_enables_reg:std_logic_vector(7 downto 0);
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signal AI_DATA,mAI_DATA: std_logic_vector(63 downto 0);
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signal AI_DATA,mAI_DATA: std_logic_vector(63 downto 0);
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signal ils_fifo_queue_dismantle_outdata:std_logic_vector(47 downto 0);
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signal tcab_instream_queue_req_0:std_logic;
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signal ils_fifo_queue_dismantle_store_req: std_logic;
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signal tcab_outstream_queue_do_1:std_logic_vector(47 downto 0);
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signal tcab_outstream_queue_req_1:std_logic;
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signal ils_fifo_queue_dismantle_load_req: std_logic;
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begin
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begin
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oAI_DATA<=AI_DATA;
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oAI_DATA<=AI_DATA;
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inst_ai:connect6ai_synth_tcab
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inst_ai:connect6ai_synth_tcab
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port map(
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port map(
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clk=>iCLK,
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clk=>iCLK,
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reset=>not(iRST_n),
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reset=>not(iRST_n),
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stallbar_out=>open,
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stallbar_out=>open,
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rawdataout_pico_ret_connect6ai_synth_0_outenable=>open,
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rawdataout_pico_ret_connect6ai_synth_0_outenable=>open,
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rawdataout_pico_connect6ai_synth_moveout_out_0_0_outenable=>out_enables(0),
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rawdataout_pico_connect6ai_synth_moveout_out_0_0_outenable=>out_enables(0),
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rawdataout_pico_connect6ai_synth_moveout_out_1_0_outenable=>out_enables(1),
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rawdataout_pico_connect6ai_synth_moveout_out_1_0_outenable=>out_enables(1),
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rawdataout_pico_connect6ai_synth_moveout_out_2_0_outenable=>out_enables(2),
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rawdataout_pico_connect6ai_synth_moveout_out_2_0_outenable=>out_enables(2),
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rawdataout_pico_connect6ai_synth_moveout_out_3_0_outenable=>out_enables(3),
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rawdataout_pico_connect6ai_synth_moveout_out_3_0_outenable=>out_enables(3),
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rawdataout_pico_connect6ai_synth_moveout_out_4_0_outenable=>out_enables(4),
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rawdataout_pico_connect6ai_synth_moveout_out_4_0_outenable=>out_enables(4),
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rawdataout_pico_connect6ai_synth_moveout_out_5_0_outenable=>out_enables(5),
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rawdataout_pico_connect6ai_synth_moveout_out_5_0_outenable=>out_enables(5),
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rawdataout_pico_connect6ai_synth_moveout_out_6_0_outenable=>out_enables(6),
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rawdataout_pico_connect6ai_synth_moveout_out_6_0_outenable=>out_enables(6),
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rawdataout_pico_connect6ai_synth_moveout_out_7_0_outenable=>out_enables(7),
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rawdataout_pico_connect6ai_synth_moveout_out_7_0_outenable=>out_enables(7),
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start=>iAI_start,
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start=>iAI_start,
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rawdatain_pico_connect6ai_synth_firstmove_in_0_0=>imovecount,
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rawdatain_pico_connect6ai_synth_firstmove_in_0_0=>imovecount,
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rawdatain_pico_connect6ai_synth_movein_0_in_1_0=>iAI_DATA(31 downto 24),
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rawdatain_pico_connect6ai_synth_movein_0_in_1_0=>iAI_DATA(31 downto 24),
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rawdatain_pico_connect6ai_synth_movein_1_in_2_0=>iAI_DATA(23 downto 16),
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rawdatain_pico_connect6ai_synth_movein_1_in_2_0=>iAI_DATA(23 downto 16),
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rawdatain_pico_connect6ai_synth_movein_2_in_3_0=>iAI_DATA(15 downto 8),
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rawdatain_pico_connect6ai_synth_movein_2_in_3_0=>iAI_DATA(15 downto 8),
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rawdatain_pico_connect6ai_synth_movein_3_in_4_0=>iAI_DATA(7 downto 0),
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rawdatain_pico_connect6ai_synth_movein_3_in_4_0=>iAI_DATA(7 downto 0),
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rawdatain_pico_connect6ai_synth_movein_4_in_5_0=>iAI_DATA(63 downto 56),
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rawdatain_pico_connect6ai_synth_movein_4_in_5_0=>iAI_DATA(63 downto 56),
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rawdatain_pico_connect6ai_synth_movein_5_in_6_0=>iAI_DATA(55 downto 48),
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rawdatain_pico_connect6ai_synth_movein_5_in_6_0=>iAI_DATA(55 downto 48),
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rawdatain_pico_connect6ai_synth_movein_6_in_7_0=>iAI_DATA(47 downto 40),
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rawdatain_pico_connect6ai_synth_movein_6_in_7_0=>iAI_DATA(47 downto 40),
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rawdatain_pico_connect6ai_synth_movein_7_in_8_0=>iAI_DATA(39 downto 32),
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rawdatain_pico_connect6ai_synth_movein_7_in_8_0=>iAI_DATA(39 downto 32),
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rawdatain_pico_connect6ai_synth_colour_in_9_0=>icolor,
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rawdatain_pico_connect6ai_synth_colour_in_9_0=>icolor,
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rawdatain_pico_connect6ai_synth_moveout_0_in_10_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_0_in_10_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_1_in_11_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_1_in_11_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_2_in_12_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_2_in_12_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_3_in_13_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_3_in_13_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_4_in_14_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_4_in_14_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_5_in_15_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_5_in_15_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_6_in_16_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_6_in_16_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_7_in_17_0=> to_stdlogicvector(x"00"),
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rawdatain_pico_connect6ai_synth_moveout_7_in_17_0=> to_stdlogicvector(x"00"),
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rawdataout_pico_ret_connect6ai_synth_0=>open,
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rawdataout_pico_ret_connect6ai_synth_0=>open,
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rawdataout_pico_connect6ai_synth_moveout_out_0_0=> mAI_DATA(63 downto 56),
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rawdataout_pico_connect6ai_synth_moveout_out_0_0=> mAI_DATA(63 downto 56),
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rawdataout_pico_connect6ai_synth_moveout_out_1_0=> mAI_DATA(55 downto 48),
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rawdataout_pico_connect6ai_synth_moveout_out_1_0=> mAI_DATA(55 downto 48),
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rawdataout_pico_connect6ai_synth_moveout_out_2_0=> mAI_DATA(47 downto 40),
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rawdataout_pico_connect6ai_synth_moveout_out_2_0=> mAI_DATA(47 downto 40),
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rawdataout_pico_connect6ai_synth_moveout_out_3_0=> mAI_DATA(39 downto 32),
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rawdataout_pico_connect6ai_synth_moveout_out_3_0=> mAI_DATA(39 downto 32),
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rawdataout_pico_connect6ai_synth_moveout_out_4_0=> mAI_DATA(31 downto 24),
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rawdataout_pico_connect6ai_synth_moveout_out_4_0=> mAI_DATA(31 downto 24),
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rawdataout_pico_connect6ai_synth_moveout_out_5_0=> mAI_DATA(23 downto 16),
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rawdataout_pico_connect6ai_synth_moveout_out_5_0=> mAI_DATA(23 downto 16),
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rawdataout_pico_connect6ai_synth_moveout_out_6_0=> mAI_DATA(15 downto 8),
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rawdataout_pico_connect6ai_synth_moveout_out_6_0=> mAI_DATA(15 downto 8),
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rawdataout_pico_connect6ai_synth_moveout_out_7_0=> mAI_DATA(7 downto 0)
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rawdataout_pico_connect6ai_synth_moveout_out_7_0=> mAI_DATA(7 downto 0),
|
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instream_queue_di_0=>ils_fifo_queue_dismantle_outdata(47 downto 0),
|
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instream_queue_req_0=>tcab_instream_queue_req_0,
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instream_queue_ready_0=>ils_fifo_queue_dismantle_store_req,
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outstream_queue_do_1=>tcab_outstream_queue_do_1(47 downto 0),
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outstream_queue_req_1=>tcab_outstream_queue_req_1,
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outstream_queue_ready_1=>ils_fifo_queue_dismantle_load_req
|
);
|
);
|
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ils_fifo_queue_dismantle:bram_based_stream_buffer
|
|
--#(.width(48), .depth(`CONNECT6AI_SYNTH_ILS_FIFO_QUEUE_DISMANTLE_LENGTH))
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|
port map(
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|
clk=>iCLK,
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reset=>not(iRST_n),
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store_ready=>tcab_instream_queue_req_0,
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flush=>'0',
|
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store_req=>ils_fifo_queue_dismantle_store_req,
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load_req=>ils_fifo_queue_dismantle_load_req,
|
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load_ready=>tcab_outstream_queue_req_1,
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indata=>tcab_outstream_queue_do_1(47 downto 0),
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outdata=>ils_fifo_queue_dismantle_outdata(47 downto 0));
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|
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process(iCLK)
|
process(iCLK)
|
begin
|
begin
|
if rising_edge(iCLK) then
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if rising_edge(iCLK) then
|
if(iAI_start='1') then
|
if(iAI_start='1') then
|
out_enables_reg<="00000000";
|
out_enables_reg<="00000000";
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for i in 0 to 7 loop
|
for i in 0 to 7 loop
|
AI_DATA( 63-8*i downto 56-8*i)<="00000000";
|
AI_DATA( 63-8*i downto 56-8*i)<="00000000";
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end loop;
|
end loop;
|
else
|
else
|
for i in 0 to 7 loop
|
for i in 0 to 7 loop
|
if(out_enables(i)='1') then
|
if(out_enables(i)='1') then
|
out_enables_reg(i)<=out_enables(i);
|
out_enables_reg(i)<=out_enables(i);
|
AI_DATA( 63-8*i downto 56-8*i)<=mAI_DATA(63-8*i downto 56-8*i);
|
AI_DATA( 63-8*i downto 56-8*i)<=mAI_DATA(63-8*i downto 56-8*i);
|
else
|
else
|
out_enables_reg(i)<=out_enables_reg(i);
|
out_enables_reg(i)<=out_enables_reg(i);
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AI_DATA( 63-8*i downto 56-8*i)<=AI_DATA(63-8*i downto 56-8*i);
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AI_DATA( 63-8*i downto 56-8*i)<=AI_DATA(63-8*i downto 56-8*i);
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end if;
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end if;
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end loop;
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end loop;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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oAI_Done<= out_enables_reg(0) and out_enables_reg(1) and out_enables_reg(2) and out_enables_reg(3) and
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oAI_Done<= out_enables_reg(0) and out_enables_reg(1) and out_enables_reg(2) and out_enables_reg(3) and
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out_enables_reg(4) and out_enables_reg(5) and out_enables_reg(6) and out_enables_reg(7);
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out_enables_reg(4) and out_enables_reg(5) and out_enables_reg(6) and out_enables_reg(7);
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|
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--oAI_Done<= out_enables(0) and out_enables(1) and out_enables(2) and out_enables(3);
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--oAI_Done<= out_enables(0) and out_enables(1) and out_enables(2) and out_enables(3);
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end architecture c_to_g;
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end architecture c_to_g;
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