%\usepackage{acro}
|
%\usepackage{acro}
|
|
|
% probably a good idea for the nomenclature entries:
|
% probably a good idea for the nomenclature entries:
|
%\acsetup{first-style=short}
|
%\acsetup{first-style=short}
|
|
|
% class `abbrev': abbreviations:
|
% class `abbrev': abbreviations:
|
%
|
%
|
%SerDes Serializer Deserializer
|
%SerDes Serializer Deserializer
|
\setlist[itemize]{noitemsep, nolistsep}
|
\setlist[itemize]{noitemsep, nolistsep}
|
\usepackage{longtable}
|
\usepackage{longtable}
|
\usepackage[acronym, nonumberlist]{glossaries}
|
\usepackage[acronym, nonumberlist]{glossaries}
|
\makenoidxglossaries
|
\makenoidxglossaries
|
\renewcommand{\glossarypreamble}{\footnotesize}
|
\renewcommand{\glossarypreamble}{\footnotesize}
|
\clearpage
|
\clearpage
|
|
|
%Intro, Protocol explanation and Requirements
|
%Intro, Protocol explanation and Requirements
|
\newacronym{cern}{CERN}{Conseil Européen pour la Recherche Nucléaire (European Council for Nuclear Research)}
|
\newacronym{cern}{CERN}{Conseil Européen pour la Recherche Nucléaire (European Council for Nuclear Research)}
|
\newacronym{crc}{CRC}{Cyclic Redundancy Check (Variants will always be noted with a '-' between CRC and the length)}
|
\newacronym{crc}{CRC}{Cyclic Redundancy Check (Variants will always be noted with a '-' between CRC and the length)}
|
\newacronym{fec}{FEC}{Forward Error Correction}
|
\newacronym{fec}{FEC}{Forward Error Correction}
|
\newacronym{fpga}{FPGA}{Field-Programmable Gate Array}
|
\newacronym{fpga}{FPGA}{Field-Programmable Gate Array}
|
\newacronym{gbps}{Gbps}{Gigabit per second}
|
\newacronym{gbps}{Gbps}{Gigabit per second}
|
\newacronym{osi}{OSI}{Open Systems Interconnection}
|
\newacronym{osi}{OSI}{Open Systems Interconnection}
|
\newacronym{phy}{PHY}{PHYsical layer of the OSI model}
|
\newacronym{phy}{PHY}{PHYsical layer of the OSI model}
|
\newacronym{serdes}{SerDes}{Serializer/Deserializer}
|
\newacronym{serdes}{SerDes}{Serializer/Deserializer}
|
|
|
%Vendor Standards
|
%Vendor Standards
|
\newacronym{ht}{HT}{HyperTransport}
|
\newacronym{ht}{HT}{HyperTransport}
|
\newacronym{nvme}{NVMe}{Non-Volatile Memory Express}
|
\newacronym{nvme}{NVMe}{Non-Volatile Memory Express}
|
\newacronym{pcie}{PCIe}{Peripheral Component Interconnect Express}
|
\newacronym{pcie}{PCIe}{Peripheral Component Interconnect Express}
|
\newacronym{spi}{SPI}{System Packet Interface}
|
\newacronym{spi}{SPI}{System Packet Interface}
|
\newacronym{sata}{SATA}{Serial Advanced Technology Attachment}
|
\newacronym{sata}{SATA}{Serial Advanced Technology Attachment}
|
\newacronym{xaui}{XAUI}{X(Ten) Attachment Unit Interface}
|
\newacronym{xaui}{XAUI}{X(Ten) Attachment Unit Interface}
|
|
|
\newacronym{vhdl}{VHDL}{VHSIC (Very High Speed Integrated Circuit) Hardware Description Language}
|
\newacronym{vhdl}{VHDL}{VHSIC (Very High Speed Integrated Circuit) Hardware Description Language}
|
\newacronym{lfsr}{LFSR}{Linear-Feedback Shift Register}
|
\newacronym{lfsr}{LFSR}{Linear-Feedback Shift Register}
|
\newacronym{emi}{EMI}{ElectroMagnetic Interference}
|
\newacronym{emi}{EMI}{ElectroMagnetic Interference}
|
\newacronym{fifo}{FIFO}{First In, First Out}
|
\newacronym{fifo}{FIFO}{First In, First Out}
|
\newacronym{sfp}{SFP}{Small form-factor pluggable}
|
\newacronym{sfp}{SFP}{Small form-factor pluggable}
|
\newacronym{ipcore}{IP core}{Intellectual Property core}
|
\newacronym{ipcore}{IP core}{Intellectual Property core}
|
|
|
|
\newacronym{io}{IO}{Input/Output}
|
|
\newacronym{gt}{GT}{Gigabit Transceiver}
|
|
\newacronym{pll}{PLL}{Phase Locked Loop}
|
|
\newacronym{mmcm}{MMCM}{Mixed-Mode Clock Manager}
|
|
\newacronym{ila}{ILA}{Integrated Logic Analizer}
|
|
\newacronym{vio}{VIO}{Virtual Input/Output}
|
|
|
\glsadd{cern}
|
\glsadd{cern}
|
\glsadd{gbps}
|
\glsadd{gbps}
|
\glsadd{osi}
|
\glsadd{osi}
|
\glsadd{phy}
|
\glsadd{phy}
|
\glsadd{spi}
|
\glsadd{spi}
|
\glsadd{sata}
|
\glsadd{sata}
|
\glsadd{pcie}
|
\glsadd{pcie}
|
\glsadd{nvme}
|
\glsadd{nvme}
|
\glsadd{ht}
|
\glsadd{ht}
|
\glsadd{xaui}
|
\glsadd{xaui}
|
\glsadd{serdes}
|
\glsadd{serdes}
|
\glsadd{crc}
|
\glsadd{crc}
|
\glsadd{fec}
|
\glsadd{fec}
|
\glsadd{fpga}
|
\glsadd{fpga}
|
\glsadd{vhdl}
|
\glsadd{vhdl}
|
\glsadd{lfsr}
|
\glsadd{lfsr}
|
\glsadd{emi}
|
\glsadd{emi}
|
\glsadd{fifo}
|
\glsadd{fifo}
|
\glsadd{sfp}
|
\glsadd{sfp}
|
\glsadd{ipcore}
|
\glsadd{ipcore}
|
|
|
|
\glsadd{io}
|
|
\glsadd{gt}
|
|
\glsadd{pll}
|
|
\glsadd{mmcm}
|
|
\glsadd{ila}
|
|
\glsadd{vio}
|
|
|
\newpage
|
\newpage
|
No newline at end of file
|
No newline at end of file
|
