`include "../bench/timescale.v"
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`include "../bench/timescale.v"
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// this module do a stream_byte opertion
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// this module do a stream_byte opertion
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module stream_byte(init,sb,
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module stream_byte(init,sb,
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Ai,Bi,Di,Ei,Fi,Xi,Yi,Zi,pi,qi,ri,
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Ai,Bi,Di,Ei,Fi,Xi,Yi,Zi,pi,qi,ri,
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Ao,Bo,Do,Eo,Fo,Xo,Yo,Zo,po,qo,ro,
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Ao,Bo,Do,Eo,Fo,Xo,Yo,Zo,po,qo,ro,
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op
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op
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);
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);
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input init;
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input init;
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input [7 :0] sb;
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input [7 :0] sb;
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input [10*4-1:0] Ai;
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input [10*4-1:0] Ai;
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input [10*4-1:0] Bi;
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input [10*4-1:0] Bi;
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input [3 :0] Di;
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input [3 :0] Di;
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input [3 :0] Ei;
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input [3 :0] Ei;
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input [3 :0] Fi;
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input [3 :0] Fi;
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input [3 :0] Xi;
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input [3 :0] Xi;
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input [3 :0] Yi;
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input [3 :0] Yi;
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input [3 :0] Zi;
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input [3 :0] Zi;
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input pi;
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input pi;
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input qi;
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input qi;
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input ri;
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input ri;
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output [10*4-1:0] Ao;
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output [10*4-1:0] Ao;
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output [10*4-1:0] Bo;
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output [10*4-1:0] Bo;
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output [3 :0] Do;
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output [3 :0] Do;
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output [3 :0] Eo;
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output [3 :0] Eo;
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output [3 :0] Fo;
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output [3 :0] Fo;
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output [3 :0] Xo;
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output [3 :0] Xo;
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output [3 :0] Yo;
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output [3 :0] Yo;
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output [3 :0] Zo;
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output [3 :0] Zo;
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output po;
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output po;
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output qo;
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output qo;
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output ro;
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output ro;
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output[7 :0] op;
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output[7 :0] op;
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// intermedate result;
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// intermedate result;
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wire [10*4-1:0] A1;
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wire [10*4-1:0] A1;
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wire [10*4-1:0] B1;
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wire [10*4-1:0] B1;
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wire [3 :0] D1;
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wire [3 :0] D1;
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wire [3 :0] E1;
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wire [3 :0] E1;
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wire [3 :0] F1;
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wire [3 :0] F1;
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wire [3 :0] X1;
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wire [3 :0] X1;
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wire [3 :0] Y1;
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wire [3 :0] Y1;
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wire [3 :0] Z1;
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wire [3 :0] Z1;
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wire p1;
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wire p1;
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wire q1;
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wire q1;
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wire r1;
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wire [10*4-1:0] A2;
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wire [10*4-1:0] A2;
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wire [10*4-1:0] B2;
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wire [10*4-1:0] B2;
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wire [3 :0] D2;
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wire [3 :0] D2;
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wire [3 :0] E2;
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wire [3 :0] E2;
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wire [3 :0] F2;
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wire [3 :0] F2;
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wire [3 :0] X2;
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wire [3 :0] X2;
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wire [3 :0] Y2;
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wire [3 :0] Y2;
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wire [3 :0] Z2;
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wire [3 :0] Z2;
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wire p2;
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wire p2;
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wire q2;
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wire q2;
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wire r2;
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wire [10*4-1:0] A3;
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wire [10*4-1:0] A3;
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wire [10*4-1:0] B3;
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wire [10*4-1:0] B3;
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wire [3 :0] D3;
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wire [3 :0] D3;
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wire [3 :0] E3;
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wire [3 :0] E3;
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wire [3 :0] F3;
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wire [3 :0] F3;
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wire [3 :0] X3;
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wire [3 :0] X3;
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wire [3 :0] Y3;
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wire [3 :0] Y3;
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wire [3 :0] Z3;
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wire [3 :0] Z3;
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wire p3;
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wire p3;
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wire q3;
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wire q3;
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wire r3;
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wire [7 :0] _op;
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wire [7 :0] _op;
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wire [3 :0] in1;
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wire [3 :0] in1;
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wire [3 :0] in2;
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wire [3 :0] in2;
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assign in1 = sb[7:4];
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assign in1 = sb[7:4];
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assign in2 = sb[3:0];
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assign in2 = sb[3:0];
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stream_iteration b1 (
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stream_iteration stream_iteration1 (
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.init(init)
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.init(init)
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,.in1 (in2)
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,.in1 (in2)
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,.in2 (in1)
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,.in2 (in1)
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,.Ai (Ai)
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,.Ai (Ai)
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,.Bi (Bi)
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,.Bi (Bi)
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,.Di (Di)
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,.Di (Di)
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,.Ei (Ei)
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,.Ei (Ei)
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,.Fi (Fi)
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,.Fi (Fi)
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,.Xi (Xi)
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,.Xi (Xi)
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,.Yi (Yi)
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,.Yi (Yi)
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,.Zi (Zi)
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,.Zi (Zi)
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,.pi (pi)
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,.pi (pi)
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,.qi (qi)
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,.qi (qi)
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,.ri (ri)
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,.ri (ri)
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,.Ao (A1)
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,.Ao (A1)
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,.Bo (B1)
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,.Bo (B1)
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,.Do (D1)
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,.Do (D1)
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,.Eo (E1)
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,.Eo (E1)
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,.Fo (F1)
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,.Fo (F1)
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,.Xo (X1)
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,.Xo (X1)
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,.Yo (Y1)
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,.Yo (Y1)
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,.Zo (Z1)
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,.Zo (Z1)
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,.po (p1)
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,.po (p1)
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,.qo (q1)
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,.qo (q1)
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,.ro (r1)
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,.ro (r1)
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,.op (_op[7:6])
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,.op (_op[7:6])
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);
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);
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stream_iteration b2 (
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stream_iteration stream_iteration2 (
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.init(init)
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.init(init)
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,.in1 (in1)
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,.in1 (in1)
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,.in2 (in2)
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,.in2 (in2)
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,.Ai (A1)
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,.Ai (A1)
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,.Bi (B1)
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,.Bi (B1)
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,.Di (D1)
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,.Di (D1)
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,.Ei (E1)
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,.Ei (E1)
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,.Fi (F1)
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,.Fi (F1)
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,.Xi (X1)
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,.Xi (X1)
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,.Yi (Y1)
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,.Yi (Y1)
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,.Zi (Z1)
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,.Zi (Z1)
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,.pi (p1)
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,.pi (p1)
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,.qi (q1)
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,.qi (q1)
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,.ri (r1)
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,.ri (r1)
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,.Ao (A2)
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,.Ao (A2)
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,.Bo (B2)
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,.Bo (B2)
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,.Do (D2)
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,.Do (D2)
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,.Eo (E2)
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,.Eo (E2)
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,.Fo (F2)
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,.Fo (F2)
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,.Xo (X2)
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,.Xo (X2)
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,.Yo (Y2)
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,.Yo (Y2)
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,.Zo (Z2)
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,.Zo (Z2)
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,.po (p2)
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,.po (p2)
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,.qo (q2)
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,.qo (q2)
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,.ro (r2)
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,.ro (r2)
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,.op (_op[5:4])
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,.op (_op[5:4])
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);
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);
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stream_iteration b3 (
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stream_iteration stream_iteration3 (
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.init(init)
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.init(init)
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,.in1 (in2)
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,.in1 (in2)
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,.in2 (in1)
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,.in2 (in1)
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,.Ai (A2)
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,.Ai (A2)
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,.Bi (B2)
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,.Bi (B2)
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,.Di (D2)
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,.Di (D2)
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,.Ei (E2)
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,.Ei (E2)
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,.Fi (F2)
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,.Fi (F2)
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,.Xi (X2)
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,.Xi (X2)
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,.Yi (Y2)
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,.Yi (Y2)
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,.Zi (Z2)
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,.Zi (Z2)
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,.pi (p2)
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,.pi (p2)
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,.qi (q2)
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,.qi (q2)
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,.ri (r2)
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,.ri (r2)
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,.Ao (A3)
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,.Ao (A3)
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,.Bo (B3)
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,.Bo (B3)
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,.Do (D3)
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,.Do (D3)
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,.Eo (E3)
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,.Eo (E3)
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,.Fo (F3)
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,.Fo (F3)
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,.Xo (X3)
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,.Xo (X3)
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,.Yo (Y3)
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,.Yo (Y3)
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,.Zo (Z3)
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,.Zo (Z3)
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,.po (p3)
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,.po (p3)
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,.qo (q3)
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,.qo (q3)
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,.ro (r3)
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,.ro (r3)
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,.op (_op[3:2])
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,.op (_op[3:2])
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);
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);
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stream_iteration b4 (
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stream_iteration stream_iteration4 (
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.init(init)
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.init(init)
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,.in1 (in1)
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,.in1 (in1)
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,.in2 (in2)
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,.in2 (in2)
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,.Ai (A3)
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,.Ai (A3)
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,.Bi (B3)
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,.Bi (B3)
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,.Di (D3)
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,.Di (D3)
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,.Ei (E3)
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,.Ei (E3)
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,.Fi (F3)
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,.Fi (F3)
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,.Xi (X3)
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,.Xi (X3)
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,.Yi (Y3)
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,.Yi (Y3)
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,.Zi (Z3)
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,.Zi (Z3)
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,.pi (p3)
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,.pi (p3)
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,.qi (q3)
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,.qi (q3)
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,.ri (r3)
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,.ri (r3)
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,.Ao (Ao)
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,.Ao (Ao)
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,.Bo (Bo)
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,.Bo (Bo)
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,.Do (Do)
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,.Do (Do)
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,.Eo (Eo)
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,.Eo (Eo)
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,.Fo (Fo)
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,.Fo (Fo)
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,.Xo (Xo)
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,.Xo (Xo)
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,.Yo (Yo)
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,.Yo (Yo)
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,.Zo (Zo)
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,.Zo (Zo)
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,.po (po)
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,.po (po)
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,.qo (qo)
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,.qo (qo)
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,.ro (ro)
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,.ro (ro)
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,.op (_op[1:0])
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,.op (_op[1:0])
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);
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);
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assign op=(init)?sb:_op;
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assign op=(init)?sb:_op;
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endmodule
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endmodule
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