/*
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/*
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* cpu.h -- CPU simulation
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* cpu.h -- CPU simulation
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*/
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*/
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#ifndef _CPU_H_
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#ifndef _CPU_H_
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#define _CPU_H_
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#define _CPU_H_
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#define IRQ_TIMER 14 /* timer interrupt */
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#define IRQ_TIMER_1 15 /* timer 1 interrupt */
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#define IRQ_TIMER_0 14 /* timer 0 interrupt */
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#define IRQ_DISK 8 /* disk interrupt */
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#define IRQ_DISK 8 /* disk interrupt */
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#define IRQ_KEYBOARD 4 /* keyboard interrupt */
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#define IRQ_KEYBOARD 4 /* keyboard interrupt */
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#define IRQ_TERM_1_RCVR 3 /* terminal 1 receiver interrupt */
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#define IRQ_TERM_1_RCVR 3 /* terminal 1 receiver interrupt */
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#define IRQ_TERM_1_XMTR 2 /* terminal 1 transmitter interrupt */
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#define IRQ_TERM_1_XMTR 2 /* terminal 1 transmitter interrupt */
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#define IRQ_TERM_0_RCVR 1 /* terminal 0 receiver interrupt */
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#define IRQ_TERM_0_RCVR 1 /* terminal 0 receiver interrupt */
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#define IRQ_TERM_0_XMTR 0 /* terminal 0 transmitter interrupt */
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#define IRQ_TERM_0_XMTR 0 /* terminal 0 transmitter interrupt */
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#define PSW_V 0x08000000 /* interrupt vector bit in PSW */
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#define PSW_V 0x08000000 /* interrupt vector bit in PSW */
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#define PSW_UM 0x04000000 /* user mode enable bit in PSW */
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#define PSW_UM 0x04000000 /* user mode enable bit in PSW */
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#define PSW_PUM 0x02000000 /* previous value of PSW_UM */
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#define PSW_PUM 0x02000000 /* previous value of PSW_UM */
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#define PSW_OUM 0x01000000 /* old value of PSW_UM */
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#define PSW_OUM 0x01000000 /* old value of PSW_UM */
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#define PSW_IE 0x00800000 /* interrupt enable bit in PSW */
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#define PSW_IE 0x00800000 /* interrupt enable bit in PSW */
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#define PSW_PIE 0x00400000 /* previous value of PSW_IE */
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#define PSW_PIE 0x00400000 /* previous value of PSW_IE */
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#define PSW_OIE 0x00200000 /* old value of PSW_IE */
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#define PSW_OIE 0x00200000 /* old value of PSW_IE */
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#define PSW_PRIO_MASK 0x001F0000 /* bits to encode IRQ prio in PSW */
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#define PSW_PRIO_MASK 0x001F0000 /* bits to encode IRQ prio in PSW */
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#define PSW_PRIO_SHFT 16 /* shift count to reach these bits */
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#define PSW_PRIO_SHFT 16 /* shift count to reach these bits */
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#define PSW_IRQ_MASK 0x0000FFFF /* IRQ mask bits */
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#define PSW_IRQ_MASK 0x0000FFFF /* IRQ mask bits */
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Word cpuGetPC(void);
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Word cpuGetPC(void);
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void cpuSetPC(Word addr);
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void cpuSetPC(Word addr);
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Word cpuGetReg(int regnum);
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Word cpuGetReg(int regnum);
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void cpuSetReg(int regnum, Word value);
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void cpuSetReg(int regnum, Word value);
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Word cpuGetPSW(void);
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Word cpuGetPSW(void);
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void cpuSetPSW(Word value);
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void cpuSetPSW(Word value);
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Word cpuGetIRQ(void);
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Word cpuGetIRQ(void);
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Bool cpuTestBreak(void);
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Bool cpuTestBreak(void);
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Word cpuGetBreak(void);
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Word cpuGetBreak(void);
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void cpuSetBreak(Word addr);
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void cpuSetBreak(Word addr);
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void cpuResetBreak(void);
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void cpuResetBreak(void);
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Word cpuGetTotal(void);
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Word cpuGetTotal(void);
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void cpuStep(void);
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void cpuStep(void);
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void cpuRun(void);
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void cpuRun(void);
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void cpuHalt(void);
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void cpuHalt(void);
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void cpuSetInterrupt(int priority);
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void cpuSetInterrupt(int priority);
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void cpuResetInterrupt(int priority);
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void cpuResetInterrupt(int priority);
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void cpuReset(void);
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void cpuReset(void);
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void cpuInit(Word initialPC);
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void cpuInit(Word initialPC);
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void cpuExit(void);
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void cpuExit(void);
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#endif /* _CPU_H_ */
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#endif /* _CPU_H_ */
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