OpenCores
URL https://opencores.org/ocsvn/ethmac10g/ethmac10g/trunk

Subversion Repositories ethmac10g

[/] [ethmac10g/] [tags/] [V10/] [M2_1E.v] - Diff between revs 40 and 72

Only display areas with differences | Details | Blame | View Log

Rev 40 Rev 72
`timescale 1ns / 1ps
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// Company: 
// Company: 
// Engineer:
// Engineer:
//
//
// Create Date:    11:54:49 12/27/05
// Create Date:    11:54:49 12/27/05
// Design Name:    
// Design Name:    
// Module Name:    M2_1E
// Module Name:    M2_1E
// Project Name:   
// Project Name:   
// Target Device:  
// Target Device:  
// Tool versions:  
// Tool versions:  
// Description:
// Description:
//
//
// Dependencies:
// Dependencies:
// 
// 
// Revision:
// Revision:
// Revision 0.01 - File Created
// Revision 0.01 - File Created
// Additional Comments:
// Additional Comments:
// 
// 
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
module M2_1E(E, S0, D0, D1, O);
module M2_1E(E, S0, D0, D1, O);
    input E;
    input E;
    input S0;
    input S0;
    input D0;
    input D0;
    input D1;
    input D1;
    output O;
    output O;
 
 
         wire M0,M1;
         wire M0,M1;
         assign M0 = D0 & ~S0 & E;
         assign M0 = D0 & ~S0 & E;
         assign M1 = D1 & S0 & E;
         assign M1 = D1 & S0 & E;
         assign O = M0 | M1;
         assign O = M0 | M1;
 
 
 
 
endmodule
endmodule
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.