# BEGIN Project Options
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# BEGIN Project Options
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SET flowvendor = Foundation_iSE
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SET flowvendor = Foundation_iSE
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SET vhdlsim = True
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SET vhdlsim = True
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SET verilogsim = True
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SET verilogsim = True
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SET workingdirectory = F:\10G\ethmac10g
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SET workingdirectory = F:\10G\ethmac10g
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SET speedgrade = -6
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SET speedgrade = -6
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SET simulationfiles = Behavioral
|
SET simulationfiles = Behavioral
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SET asysymbol = True
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SET asysymbol = True
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SET addpads = False
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SET addpads = False
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# SET outputdirectory = F:\10G\ethmac10g
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# SET outputdirectory = F:\10G\ethmac10g
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SET device = xc2vp20
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SET device = xc2vp20
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# SET projectname = F:\10G\ethmac10g
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# SET projectname = F:\10G\ethmac10g
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SET implementationfiletype = Edif
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SET implementationfiletype = Edif
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SET busformat = BusFormatAngleBracketNotRipped
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SET busformat = BusFormatAngleBracketNotRipped
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SET foundationsym = False
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SET foundationsym = False
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SET package = fg676
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SET package = fg676
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SET createndf = False
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SET createndf = False
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SET designentry = VHDL
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SET designentry = VHDL
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SET devicefamily = virtex2p
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SET devicefamily = virtex2p
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SET formalverification = False
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SET formalverification = False
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SET removerpms = False
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SET removerpms = False
|
# END Project Options
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# END Project Options
|
# BEGIN Select
|
# BEGIN Select
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SELECT Synchronous_FIFO family Xilinx,_Inc. 5.0
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SELECT Synchronous_FIFO family Xilinx,_Inc. 5.0
|
# END Select
|
# END Select
|
# BEGIN Parameters
|
# BEGIN Parameters
|
CSET memory_type=Block_Memory
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CSET memory_type=Block_Memory
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CSET write_acknowledge_flag=false
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CSET write_acknowledge_flag=false
|
CSET data_width=8
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CSET data_width=8
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CSET write_error_flag=false
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CSET write_error_flag=false
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CSET read_acknowledge_sense=Active_Low
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CSET read_acknowledge_sense=Active_Low
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CSET data_count_width=1
|
CSET data_count_width=1
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CSET fifo_depth=128
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CSET fifo_depth=128
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CSET component_name=rxcntrlfifo
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CSET component_name=rxcntrlfifo
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CSET data_count=false
|
CSET data_count=false
|
CSET read_acknowledge_flag=false
|
CSET read_acknowledge_flag=false
|
CSET read_error_sense=Active_Low
|
CSET read_error_sense=Active_Low
|
CSET read_error_flag=false
|
CSET read_error_flag=false
|
CSET write_acknowledge_sense=Active_Low
|
CSET write_acknowledge_sense=Active_Low
|
CSET write_error_sense=Active_Low
|
CSET write_error_sense=Active_Low
|
# END Parameters
|
# END Parameters
|
GENERATE
|
GENERATE
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