OpenCores
URL https://opencores.org/ocsvn/ethmac10g/ethmac10g/trunk

Subversion Repositories ethmac10g

[/] [ethmac10g/] [tags/] [V10/] [rxRSLayer.v] - Diff between revs 40 and 72

Only display areas with differences | Details | Blame | View Log

Rev 40 Rev 72
`timescale 1ns / 1ps
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// Company: 
// Company: 
// Engineer:
// Engineer:
//
//
// Create Date:    15:11:04 12/22/05
// Create Date:    15:11:04 12/22/05
// Design Name:    
// Design Name:    
// Module Name:    rxRSLayer
// Module Name:    rxRSLayer
// Project Name:   
// Project Name:   
// Target Device:  
// Target Device:  
// Tool versions:  
// Tool versions:  
// Description:
// Description:
//
//
// Dependencies:
// Dependencies:
// 
// 
// Revision:
// Revision:
// Revision 0.01 - File Created
// Revision 0.01 - File Created
// Additional Comments:
// Additional Comments:
// 
// 
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
module rxRSLayer(rxclk_2x, reset, link_fault, rxd64, rxc8, rxd, rxc);
module rxRSLayer(rxclk_2x, reset, link_fault, rxd64, rxc8, rxd, rxc);
    input rxclk_2x;
    input rxclk_2x;
    input reset;
    input reset;
         input [31:0] rxd;
         input [31:0] rxd;
    input [3:0] rxc;
    input [3:0] rxc;
    output [1:0] link_fault;
    output [1:0] link_fault;
    output [63:0] rxd64;
    output [63:0] rxd64;
    output [7:0] rxc8;
    output [7:0] rxc8;
 
 
         wire  local_fault;
         wire  local_fault;
         wire  remote_fault;
         wire  remote_fault;
         wire[1:0]  link_fault;
         wire[1:0]  link_fault;
 
 
         rxRSIO datapath(.rxclk_2x(rxclk_2x),
         rxRSIO datapath(.rxclk_2x(rxclk_2x),
                         .reset(reset),
                         .reset(reset),
                                                  .rxd(rxd),
                                                  .rxd(rxd),
                                                  .rxc(rxc),
                                                  .rxc(rxc),
                                                  .rxd64(rxd64),
                                                  .rxd64(rxd64),
                                                  .rxc8(rxc8),
                                                  .rxc8(rxc8),
                                                  .local_fault(local_fault),
                                                  .local_fault(local_fault),
                                                  .remote_fault(remote_fault)
                                                  .remote_fault(remote_fault)
                                                  );
                                                  );
 
 
         rxLinkFaultState statemachine(.rxclk_2x(rxclk_2x),
         rxLinkFaultState statemachine(.rxclk_2x(rxclk_2x),
                                       .reset(reset),
                                       .reset(reset),
                                                                                         .local_fault(local_fault),
                                                                                         .local_fault(local_fault),
                                                                                         .remote_fault(remote_fault),
                                                                                         .remote_fault(remote_fault),
                                                                                         .link_fault(link_fault)
                                                                                         .link_fault(link_fault)
                                                                                         );
                                                                                         );
 
 
endmodule
endmodule
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.