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FIFO
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Common_Clock_Block_RAM
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FIFO
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FIFO
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FIFO
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FIFO
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FIFO
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FIFO
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1023
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1023
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No_Programmable_Empty_Threshold
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1022
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1022
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Fully_Registered
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2
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1
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64
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512x36
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512x36
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1kx36
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512x36
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512x36
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512x36
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512x36
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1kx36
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32
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xc7k325t
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ffg900
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-2
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-2
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C
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C
|
|
|
VHDL
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|
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|
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|
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TRUE
|
TRUE
|
TRUE
|
xilinx.com:kc705:part0:0.9
|
xilinx.com:kc705:part0:0.9
|
TRUE
|
TRUE
|
2014.4
|
2014.4
|
3
|
3
|
OUT_OF_CONTEXT
|
OUT_OF_CONTEXT
|
|
|
.
|
.
|
.
|
.
|
|
|
|
|
|
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