// ============================================================================
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// ============================================================================
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// __
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// __
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// \\__/ o\ (C) 2020 Robert Finch, Waterloo
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// \\__/ o\ (C) 2020 Robert Finch, Waterloo
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// \ __ / All rights reserved.
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// \ __ / All rights reserved.
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// \/_// robfinch@finitron.ca
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// \/_// robfinch@finitron.ca
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// ||
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// ||
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//
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//
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// positToFp.v
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// positToFp.sv
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// - posit number to floating point convertor
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// - posit number to floating point convertor
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// - can issue every clock cycle
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// - can issue every clock cycle
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// - parameterized width
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// - parameterized width
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// - IEEE 754 representation
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// - IEEE 754 representation
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//
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//
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// Parts of this code originated from Posit_to_FP.v by Manish Kumar Jaiswal
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// Parts of this code originated from Posit_to_FP.v by Manish Kumar Jaiswal
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//
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//
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// This source file is free software: you can redistribute it and/or modify
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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// (at your option) any later version.
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//
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//
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// This source file is distributed in the hope that it will be useful,
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// GNU General Public License for more details.
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//
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//
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// You should have received a copy of the GNU General Public License
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see .
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// along with this program. If not, see .
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//
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//
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// ============================================================================
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// ============================================================================
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`include "positConfig.sv"
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import posit::*;
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`include "fpConfig.sv"
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import fp::*;
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`include "fpTypes.sv"
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`include "../fpu/fpTypes.sv"
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module positToFp(i, o);
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module positToFp(i, o);
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parameter FPWID = 32;
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`include "fpSize.sv"
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`include "positSize.sv"
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input [FPWID-1:0] i;
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input [FPWID-1:0] i;
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output reg [FPWID-1:0] o;
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output reg [FPWID-1:0] o;
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parameter BIAS = {1'b0,{EMSB{1'b1}}};
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parameter BIAS = {1'b0,{EMSB{1'b1}}};
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localparam N = FPWID;
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localparam N = FPWID;
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localparam E = EMSB+1;
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localparam E = EMSB+1;
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localparam M = FMSB+1;
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localparam M = FMSB+1;
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localparam Bs = $clog2(FPWID-1);
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localparam Bs = $clog2(FPWID-1);
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localparam EO = E > es+Bs ? E : es+Bs;
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localparam EO = E > es+Bs ? E : es+Bs;
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wire sgn;
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wire sgn;
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wire rgs;
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wire rgs;
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wire [Bs-1:0] rgm;
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wire [Bs-1:0] rgm;
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wire [es-1:0] exp;
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wire [es-1:0] exp;
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wire [N-es-1:0] sig;
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wire [N-es-1:0] sig;
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wire zer;
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wire zer;
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wire inf;
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wire inf;
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positDecompose #(.PSTWID(PSTWID), .es(es)) u1 (.i(i), .sgn(sgn), .rgs(rgs), .rgm(rgm), .exp(exp), .sig(sig), .zer(zer), .inf(inf));
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positDecompose #(.PSTWID(PSTWID)) u1 (.i(i), .sgn(sgn), .rgs(rgs), .rgm(rgm), .exp(exp), .sig(sig), .zer(zer), .inf(inf));
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wire [N-1:0] m = {sig,{es{1'b0}}};
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wire [N-1:0] m = {sig,{es{1'b0}}};
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wire [EO+1:0] e;
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wire [EO+1:0] e;
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assign e = {(rgs ? {{EO-es-Bs+1{1'b0}},rgm} : -{{EO-es-Bs+1{1'b0}},rgm}),exp} + BIAS;
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assign e = {(rgs ? {{EO-es-Bs+1{1'b0}},rgm} : -{{EO-es-Bs+1{1'b0}},rgm}),exp} + BIAS;
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wire exv = |e[EO:E];
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wire exv = |e[EO:E];
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wire exinf = &e[E-1:0];
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wire exinf = &e[E-1:0];
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always @*
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always @*
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casez({zer,inf|exv|exinf}) // exponent all ones or exponent overflow?
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casez({zer,inf|exv|exinf}) // exponent all ones or exponent overflow?
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// convert to +0.0 zero-in zero-out (the sign will always be plus)
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// convert to +0.0 zero-in zero-out (the sign will always be plus)
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2'b1?: o = {sgn,{FPWID-1{1'b0}}};
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2'b1?: o = {sgn,{FPWID-1{1'b0}}};
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// Infinity in or exponent overflow in conversion = infinity out
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// Infinity in or exponent overflow in conversion = infinity out
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2'b01: o = {sgn,{E-1{1'b1}},{M{1'b0}}};
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2'b01: o = {sgn,{E-1{1'b1}},{M{1'b0}}};
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// Other numbers
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// Other numbers
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default: o = {sgn,e[E-1:0],m[N-2:E]};
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default: o = {sgn,e[E-1:0],m[N-2:E]};
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endcase
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endcase
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endmodule
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endmodule
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