|
|
|
|
|
|
|
|
|
|
|
|
TUT
|
TUT
|
ip.hwp.accelerator
|
ip.hwp.accelerator
|
hibi_dct
|
hibi_dct
|
1.0
|
1.0
|
DCT to Hibi. Connects dctQidct block to HIBI Wrapper
|
This block combines dct to hibi dctQidct block together
|
|
|
|
DCT_TO_HIBI Connects dctQidct block to HIBI Wrapper
|
|
|
Input:
|
Input:
|
1. Two address to send the results to (one for quant, one for idct)
|
1. Address to send the results to quant
|
|
2. Address to send the results to idct (set unused address if you don't use this)
|
2. Control word for the current macroblock
|
2. Control word for the current macroblock
|
Control word structure: bit 6: chroma(1)/luma(0), 5: intra(1)/inter(0),
|
Control word structure: bit 6: chroma(1)/luma(0) NOT USED,
|
|
5: intra(1)/inter(0),
|
4..0: quantizer parameter (QP)
|
4..0: quantizer parameter (QP)
|
3. Then the DCT data ( 8x8x6 x 16-bit values = 384 x 16 bit )
|
3. Then the DCT data ( 8x8x6 x 16-bit values = 384 x 16 bit )
|
|
|
Chroma/luma: 4 luma, 2 chroma
|
Only 9b DCT data values are supported currently.
|
|
Send two DCT-values packed to upper and lower 16bits in the sigle hibi transmission.
|
|
|
|
<31------------------16--------------------0> BIT index
|
|
DCT_DATA_1 DCT_DATA_0 DATA
|
|
|
|
|
|
NOTE: If self release is used (use_self_rel_g=1) user gets the signal that dct_to_hibi is ready to receive data.
|
|
By default self release is disabled and you user can send data to dct_to_hibi after quant results are received.
|
|
|
|
|
Outputs:
|
Outputs:
|
Outputs are 16-bit words which are packed up to hibi. If hibi width is
|
Outputs are 16-bit words which are packed up to hibi. If hibi width is
|
32b, then 2 16-bit words are combined into one hibi word.
|
32b, then 2 16-bit words are combined into one hibi word.
|
01. quant results: 1. 8*8 x 16bit values to quant result address
|
01. quant results: 1. 8*8 x 16bit values to quant result address
|
02. idct results: 1. 8*8 x 16bit values to idct result address
|
02. idct results: 1. 8*8 x 16bit values to idct result address
|
03. quant results: 2. 8*8 x 16bit values to quant result address
|
03. quant results: 2. 8*8 x 16bit values to quant result address
|
04. idct results: 2. 8*8 x 16bit values to idct result address
|
04. idct results: 2. 8*8 x 16bit values to idct result address
|
05. quant results: 3. 8*8 x 16bit values to quant result address
|
05. quant results: 3. 8*8 x 16bit values to quant result address
|
06. idct results: 3. 8*8 x 16bit values to idct result address
|
06. idct results: 3. 8*8 x 16bit values to idct result address
|
07. quant results: 4. 8*8 x 16bit values to quant result address
|
07. quant results: 4. 8*8 x 16bit values to quant result address
|
08. idct results: 4. 8*8 x 16bit values to idct result address
|
08. idct results: 4. 8*8 x 16bit values to idct result address
|
09. quant results: 5. 8*8 x 16bit values to quant result address
|
09. quant results: 5. 8*8 x 16bit values to quant result address
|
10. idct results: 5. 8*8 x 16bit values to idct result address
|
10. idct results: 5. 8*8 x 16bit values to idct result address
|
11. quant results: 6. 8*8 x 16bit values to quant result address
|
11. quant results: 6. 8*8 x 16bit values to quant result address
|
12. quant results: 1 word with bits 5..0 determing if 8x8 quant blocks(1-6)
|
12. quant results: 1 word with bits 5..0 determing if 8x8 quant blocks(1-6)
|
has all values zeros (except dc-component in intra)
|
has all values zeros (except dc-component in intra)
|
13. idct results: 6. 8*8 x 16bit values to idct result address
|
13. idct results: 6. 8*8 x 16bit values to idct result address
|
-
|
-
|
Total amount of 16-bit values is: 384 per result address + 1 hibi word to
|
Total amount of 16-bit values is: 384 per result address + 1 hibi word to
|
quantization result address.
|
quantization result address.
|
|
|
With default parameter:
|
With default parameter:
|
Total of 193 words of data to quant address (if data_width_g = 32)
|
Total of 193 words of data to quant address (if data_width_g = 32)
|
Total of 192 words of data to idct address (if data_width_g = 32)
|
Total of 192 words of data to idct address (if data_width_g = 32)
|
|
|
|
|
|
|
rst_n
|
rst_n
|
|
|
|
|
|
|
false
|
false
|
|
|
|
|
|
|
RESETn
|
RESETn
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
rst_n
|
rst_n
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
8
|
8
|
little
|
little
|
|
|
|
|
clk
|
clk
|
|
|
|
|
|
|
false
|
false
|
|
|
|
|
|
|
CLK
|
CLK
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
clk
|
clk
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
8
|
8
|
little
|
little
|
|
|
|
|
hibi_slave
|
hibi_slave
|
|
|
|
|
|
|
false
|
false
|
|
|
|
|
|
|
AV
|
AV
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
hibi_av_in
|
hibi_av_in
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
COMM
|
COMM
|
|
|
4
|
4
|
0
|
0
|
|
|
|
|
|
|
hibi_comm_in
|
hibi_comm_in
|
|
|
4
|
4
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
DATA
|
DATA
|
|
|
31
|
31
|
0
|
0
|
|
|
|
|
|
|
hibi_data_in
|
hibi_data_in
|
|
|
31
|
31
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
EMPTY
|
EMPTY
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
hibi_empty_in
|
hibi_empty_in
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
FULL
|
FULL
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
hibi_full_in
|
hibi_full_in
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
8
|
8
|
little
|
little
|
|
|
|
|
hibi_master
|
hibi_master
|
|
|
|
|
|
|
false
|
false
|
|
|
|
|
|
|
AV
|
AV
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
hibi_av_out
|
hibi_av_out
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
COMM
|
COMM
|
|
|
4
|
4
|
0
|
0
|
|
|
|
|
|
|
hibi_comm_out
|
hibi_comm_out
|
|
|
4
|
4
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
DATA
|
DATA
|
|
|
31
|
31
|
0
|
0
|
|
|
|
|
|
|
hibi_data_out
|
hibi_data_out
|
|
|
31
|
31
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
RE
|
RE
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
hibi_re_out
|
hibi_re_out
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
WE
|
WE
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
hibi_we_out
|
hibi_we_out
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
8
|
8
|
little
|
little
|
|
|
|
|
|
|
|
|
|
|
structural
|
structural
|
::
|
::
|
|
|
|
|
structural_vhd
|
structural_vhd
|
|
|
|
|
|
|
structural_vhd
|
structural_vhd
|
VHDL:Kactus2:
|
VHDL:Kactus2:
|
vhdl
|
vhdl
|
hibi_dct
|
hibi_dct
|
|
|
structural_vhdlSource
|
structural_vhdlSource
|
|
|
|
|
|
|
|
|
|
|
clk
|
clk
|
|
|
in
|
in
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
rst_n
|
rst_n
|
|
|
in
|
in
|
|
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
hibi_av_in
|
hibi_av_in
|
|
|
in
|
in
|
|
|
|
|
|
|
|
|
hibi_comm_in
|
hibi_comm_in
|
|
|
in
|
in
|
|
|
4
|
4
|
0
|
0
|
|
|
|
|
"000"
|
"000"
|
|
|
|
|
|
|
|
|
|
|
hibi_data_in
|
hibi_data_in
|
|
|
in
|
in
|
|
|
31
|
31
|
0
|
0
|
|
|
|
|
(others => '0')
|
(others => '0')
|
|
|
|
|
|
|
|
|
|
|
hibi_empty_in
|
hibi_empty_in
|
|
|
in
|
in
|
|
|
'0'
|
'0'
|
|
|
|
|
|
|
|
|
|
|
hibi_full_in
|
hibi_full_in
|
|
|
in
|
in
|
|
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
hibi_av_out
|
hibi_av_out
|
|
|
out
|
out
|
|
|
|
|
|
|
|
|
hibi_comm_out
|
hibi_comm_out
|
|
|
out
|
out
|
|
|
4
|
4
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
hibi_data_out
|
hibi_data_out
|
|
|
out
|
out
|
|
|
31
|
31
|
0
|
0
|
|
|
|
|
|
|
|
|
|
|
hibi_re_out
|
hibi_re_out
|
|
|
out
|
out
|
|
|
|
|
|
|
|
|
hibi_we_out
|
hibi_we_out
|
|
|
out
|
out
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
structural_vhdlSource
|
structural_vhdlSource
|
sourceFiles
|
sourceFiles
|
|
|
vhd/hibi_dct.vhd
|
vhd/hibi_dct.vhd
|
vhdlSource
|
vhdlSource
|
true
|
true
|
work
|
work
|
|
|
vcom
|
vcom
|
-quiet -check_synthesis -work work
|
-quiet -check_synthesis -work work
|
true
|
true
|
|
|
|
|
|
|
vhdlSource
|
vhdlSource
|
vcom
|
vcom
|
-quiet -check_synthesis -work work
|
-quiet -check_synthesis -work work
|
true
|
true
|
|
|
|
|
vhdlSource-87
|
vhdlSource-87
|
vcom
|
vcom
|
-quiet -check_synthesis -work work
|
-quiet -check_synthesis -work work
|
true
|
true
|
|
|
|
|
vhdlSource-93
|
vhdlSource-93
|
vcom
|
vcom
|
-quiet -check_synthesis -work work
|
-quiet -check_synthesis -work work
|
true
|
true
|
|
|
|
|
|
|
|
|
|
|
|
|
IP
|
IP
|
HW
|
HW
|
Parameterizable
|
Parameterizable
|
|
|
|
|
|
|
|
|
|
|