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[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-fw/] [README] - Diff between revs 9 and 20

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# README -- the short version
# README -- the short version
#
#
 
 
The top level makefile handles the host code and FX2 firmware.
The top level makefile handles the FX2 firmware.
 
 
Besides the normal gcc suite and all the auto tools, you'll need
You'll need the SDCC free C compiler to build the firmware.  You MUST
the SDCC free C compiler to build the firmware.  You MUST
 
USE VERSION 2.4.0 or VERSION 2.5.0 due to some problems with variable
USE VERSION 2.4.0 or VERSION 2.5.0 due to some problems with variable
initialization.  http://sdcc.sourceforge.net
initialization.  http://sdcc.sourceforge.net
 
 
 
 
The high level interface to the USRP using our standard FPGA bitstram
 
is contained in usrp/host/lib/usrp_standard.h
 
 
 
If you've got doxygen installed, there are html docs in
If you've got doxygen installed, there are html docs in
usrp/doc/html/index.html
doc/html/index.html
 
 
 
 
# Compiling the verilog (not required unless you're modifying it)
 
 
 
If you want to build the FPGA .rbf file from source (not required; we
Possible make targets:
provide pre-compiled .rbf files in usrp/fpga/rbf directory), you'll
* make (default will build the firmware as hex file)
need Altera's no cost Quartus II development tools.  We're currently
* make iic (will generate a downloadable iic file using Hex2Bix.exe with wine)
building with Quartus II 5.1sp1 Web Edition.  The project file is
* make doc (will generate the html documentation using doxygen)
usrp/fpga/toplevel/usrp_std/usrp_std.qpf.  The toplevel verilog file
 
is usrp/fpga/toplevel/usrp_std/usrp_std.v.  The bulk of the verilog
 
modules are contained in usrp/fpga/sdr_lib
 
 
 
 
For more information, read the source code documentation or the manual in the GECKO3 wiki:
 
http://labs.ti.bfh.ch/gecko/wiki/systems/gecko3com/start
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