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[/] [generic_booth_multipler/] [trunk/] [rtl/] [modules/] [00.LeftShiftReg.vhd] - Diff between revs 2 and 6

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Rev 2 Rev 6
 
 
library IEEE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_1164.ALL;
 
 
entity LeftShiftReg is
entity LeftShiftReg is
 
                generic(
 
                        size : integer:= 4
 
                );
                port(
                port(
                        clock    :in    std_logic;
                        clock    :in    std_logic;
                        enable :in      std_logic;
                        enable :in      std_logic;
                        shift    :in    std_logic;
                        shift    :in    std_logic;
                        din      :in    std_logic_vector;
                        din      :in    std_logic_vector(size-1 downto 0);
                        dout     :out std_logic_vector);
                        dout     :out std_logic_vector(size-1 downto 0));
end LeftShiftReg;
end LeftShiftReg;
 
 
architecture Behavioral of LeftShiftReg is
architecture Behavioral of LeftShiftReg is
        signal data : std_logic_vector(din'range);
        signal data : std_logic_vector(din'range);
begin
begin
        process(clock,enable,shift)
        process(clock, enable, shift)
        begin
        begin
                if(clock'event and clock = '1')then
                if(clock'event and clock = '1')then
                        if(enable = '1')then
                        if(enable = '1')then
                                data <= din;
                                data <= din;
                        elsif(shift = '1') then
                        elsif(shift = '1') then
                                data <= data(din'length-2 downto 0) & '0';
                                data <= data(din'length-2 downto 0) & '0';
                        else
                        else
                                data <= data;
                                data <= data;
                        end if;
                        end if;
                end if;
                end if;
        end process;
        end process;
        dout <= data;
        dout <= data;
 
 
end Behavioral;
end Behavioral;
 
 
 
 

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