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Subversion Repositories gpib_controller

[/] [gpib_controller/] [trunk/] [prototype_1/] [fpga/] [xilinx_prj/] [iseconfig/] [proto1.projectmgr] - Diff between revs 3 and 5

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Rev 3 Rev 5
   
   
   
   
      
      
         
         
         /EdgeDetector - arch
         /EdgeDetector - arch
         /Fifo8b - arch
         /Fifo8b - arch
         /Fifo8b_Test_vhd - behavior
         /Fifo8b_Test_vhd - behavior
         /RegsGpibFasade - arch
         /RegsGpibFasade - arch
         /RegsGpibFasade_communication_test - behavior
         /RegsGpibFasade_communication_test - behavior
         /Uart - arch
         /Uart - arch
         /gpibInterface - Behavioral
         /gpibInterface - Behavioral
         /main - Behavioral
         /main - Behavioral
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/ev - EventReg - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/ev - EventReg - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/gpib - gpibInterface - Behavioral
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/gpib - gpibInterface - Behavioral
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/ig - InterruptGenerator - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/ig - InterruptGenerator - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/rc0 - ReaderControlReg0 - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/rc0 - ReaderControlReg0 - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/readerFifo - Fifo8b - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/readerFifo - Fifo8b - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/wc0 - WriterControlReg0 - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/wc0 - WriterControlReg0 - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/writerFifo - Fifo8b - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch/writerFifo - Fifo8b - arch
      
      
      
      
         gpib - gpibInterface - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/vhdl/src/gpib/gpibInterface.vhd)
         gpib - gpibInterface - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/vhdl/src/gpib/gpibInterface.vhd)
      
      
      0
      0
      0
      0
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      000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000104000000020000000000000000000000000000000064ffffffff000000810000000000000002000001040000000100000000000000000000000100000000
      true
      true
      gpib - gpibInterface - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/vhdl/src/gpib/gpibInterface.vhd)
      gpib - gpibInterface - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/vhdl/src/gpib/gpibInterface.vhd)
   
   
   
   
      
      
         Design Utilities/Compile HDL Simulation Libraries
         Design Utilities/Compile HDL Simulation Libraries
      
      
      
      
         Add Existing Source
         Add Existing Source
      
      
      0
      0
      0
      0
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      false
      false
      Add Existing Source
      Add Existing Source
   
   
   
   
      
      
      
      
      0
      0
      0
      0
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      000000ff00000000000000010000000000000000010000000000000000000000000000000000000250000000040101000100000000000000000000000064ffffffff000000810000000000000004000000420000000100000000000000240000000100000000000000660000000100000000000001840000000100000000
      false
      false
      commandDecoder.vhd
      commandDecoder.vhd
   
   
   
   
      
      
         work
         work
      
      
      
      
      0
      0
      0
      0
      000000ff00000000000000010000000000000000010000000000000000000000000000000000000128000000010001000100000000000000000000000064ffffffff000000810000000000000001000001280000000100000000
      000000ff00000000000000010000000000000000010000000000000000000000000000000000000128000000010001000100000000000000000000000064ffffffff000000810000000000000001000001280000000100000000
      false
      false
      work
      work
   
   
   
   
      
      
         Design Utilities
         Design Utilities
         Implement Design
         Implement Design
         Synthesize - XST
         Synthesize - XST
      
      
      
      
         Add Existing Source
         Add Existing Source
      
      
      0
      0
      0
      0
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      false
      false
      Add Existing Source
      Add Existing Source
   
   
   
   
      
      
         User Constraints
         User Constraints
      
      
      
      
         Add Existing Source
         Add Existing Source
      
      
      0
      0
      0
      0
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      false
      false
      Add Existing Source
      Add Existing Source
   
   
   000000ff00000000000000020000015e0000012a01000000040100000002
   000000ff00000000000000020000015e0000012a01000000040100000002
   Implementation
   Implementation
   
   
      
      
         /Fifo8b_Test_vhd - behavior
         /Fifo8b_Test_vhd - behavior
         /MemoryBlock_Test_vhd - behavior
         /MemoryBlock_Test_vhd - behavior
         /MemoryBlock_Test_vhd - behavior/uut - MemoryBlock - arch
         /MemoryBlock_Test_vhd - behavior/uut - MemoryBlock - arch
         /RegMultiplexer_Test_vhd - behavior
         /RegMultiplexer_Test_vhd - behavior
         /RegsGpibFasade_communication_test - behavior
         /RegsGpibFasade_communication_test - behavior
         /RegsGpibFasade_test - behavior
         /RegsGpibFasade_test - behavior
         /RegsGpibFasade_test - behavior/uut - RegsGpibFasade - arch
         /RegsGpibFasade_test - behavior/uut - RegsGpibFasade - arch
         /gpibInterfaceTest - behavior
         /gpibInterfaceTest - behavior
         /gpibReaderTest - behavior
         /gpibReaderTest - behavior
         /gpibWriterReaderTest - behavior
         /gpibWriterReaderTest - behavior
         /gpib_DC_Test - behavior
         /gpib_DC_Test - behavior
         /gpib_DT_Test - behavior
         /gpib_DT_Test - behavior
         /gpib_PP_Test - behavior
         /gpib_PP_Test - behavior
         /gpib_RL_Test - behavior
         /gpib_RL_Test - behavior
         /gpib_SeriallPoll_Test - behavior
         /gpib_SeriallPoll_Test - behavior
         /gpib_TE_LE_Test - behavior
         /gpib_TE_LE_Test - behavior
         /main - Behavioral
         /main - Behavioral
         /main - Behavioral/gpib0 - RegsGpibFasade - arch
         /main - Behavioral/gpib0 - RegsGpibFasade - arch
      
      
      
      
         main - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/prototype_1/fpga/proto1/src/main.vhd)
         main - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/prototype_1/fpga/proto1/src/main.vhd)
      
      
      3
      3
      0
      0
      000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000002a0000000020000000000000000000000000000000064ffffffff000000810000000000000002000002a00000000100000000000000000000000100000000
      000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000002a0000000020000000000000000000000000000000064ffffffff000000810000000000000002000002a00000000100000000000000000000000100000000
      false
      false
      main - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/prototype_1/fpga/proto1/src/main.vhd)
      main - Behavioral (/home/andrzej/apaluch/projects/elektronika/GPIB/prototype_1/fpga/proto1/src/main.vhd)
   
   
   
   
      
      
         Design Utilities
         Design Utilities
      
      
      
      
         Add Existing Source
         Add Existing Source
      
      
      0
      0
      0
      0
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      false
      false
      Add Existing Source
      Add Existing Source
   
   
   
   
      
      
      
      
         Behavioral Check Syntax
         Behavioral Check Syntax
      
      
      0
      0
      0
      0
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      000000ff00000000000000010000000100000000000000000000000000000000000000000000000124000000010000000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
      false
      false
      Behavioral Check Syntax
      Behavioral Check Syntax
   
   
 
 

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