`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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// IBM 650 Reconstruction in Verilog (i650)
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// IBM 650 Reconstruction in Verilog (i650)
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//
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//
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// This file is part of the IBM 650 Reconstruction in Verilog (i650) project
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// This file is part of the IBM 650 Reconstruction in Verilog (i650) project
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// http:////www.opencores.org/project,i650
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// http:////www.opencores.org/project,i650
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//
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//
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// Description:
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// Description:
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// Convert dynamic portion of 650 address into a word offset in general
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// Convert dynamic portion of 650 address into a word offset in general
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// storage RAM.
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// storage RAM.
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//
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//
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// Additional Comments:
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// Additional Comments:
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//
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//
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// Copyright (c) 2015 Robert Abeles
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// Copyright (c) 2015 Robert Abeles
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//
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//
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// This source file is free software; you can redistribute it
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// This source file is free software; you can redistribute it
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// and/or modify it under the terms of the GNU Lesser General
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// and/or modify it under the terms of the GNU Lesser General
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// Public License as published by the Free Software Foundation;
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// Public License as published by the Free Software Foundation;
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// either version 2.1 of the License, or (at your option) any
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// either version 2.1 of the License, or (at your option) any
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// later version.
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// later version.
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//
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//
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// This source is distributed in the hope that it will be
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// This source is distributed in the hope that it will be
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// useful, but WITHOUT ANY WARRANTY; without even the implied
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// useful, but WITHOUT ANY WARRANTY; without even the implied
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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// PURPOSE. See the GNU Lesser General Public License for more
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// PURPOSE. See the GNU Lesser General Public License for more
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// details.
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// details.
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//
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//
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// You should have received a copy of the GNU Lesser General
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// You should have received a copy of the GNU Lesser General
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// Public License along with this source; if not, download it
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// Public License along with this source; if not, download it
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// from http://www.opencores.org/lgpl.shtml
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// from http://www.opencores.org/lgpl.shtml
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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module ram_word_offset (
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module ram_word_offset (
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input [0:6] addr_t, addr_u,
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input [0:6] addr_t, addr_u,
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output reg [0:14] offset
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output reg [0:9] offset
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);
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);
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always @(*) begin
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always @(*) begin
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case({addr_t[2:6], addr_u})
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case({addr_t[2:6], addr_u})
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12'b00001_01_00001: offset = 15'd0;
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12'b00001_01_00001: offset = 10'd0;
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12'b00001_01_00010: offset = 15'd12;
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12'b00001_01_00010: offset = 10'd12;
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12'b00001_01_00100: offset = 15'd24;
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12'b00001_01_00100: offset = 10'd24;
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12'b00001_01_01000: offset = 15'd36;
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12'b00001_01_01000: offset = 10'd36;
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12'b00001_01_10000: offset = 15'd48;
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12'b00001_01_10000: offset = 10'd48;
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12'b00001_10_00001: offset = 15'd60;
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12'b00001_10_00001: offset = 10'd60;
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12'b00001_10_00010: offset = 15'd72;
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12'b00001_10_00010: offset = 10'd72;
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12'b00001_10_00100: offset = 15'd84;
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12'b00001_10_00100: offset = 10'd84;
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12'b00001_10_01000: offset = 15'd96;
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12'b00001_10_01000: offset = 10'd96;
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12'b00001_10_10000: offset = 15'd108;
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12'b00001_10_10000: offset = 10'd108;
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12'b00010_01_00001: offset = 15'd120;
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12'b00010_01_00001: offset = 10'd120;
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12'b00010_01_00010: offset = 15'd132;
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12'b00010_01_00010: offset = 10'd132;
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12'b00010_01_00100: offset = 15'd144;
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12'b00010_01_00100: offset = 10'd144;
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12'b00010_01_01000: offset = 15'd156;
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12'b00010_01_01000: offset = 10'd156;
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12'b00010_01_10000: offset = 15'd168;
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12'b00010_01_10000: offset = 10'd168;
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12'b00010_10_00001: offset = 15'd180;
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12'b00010_10_00001: offset = 10'd180;
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12'b00010_10_00010: offset = 15'd192;
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12'b00010_10_00010: offset = 10'd192;
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12'b00010_10_00100: offset = 15'd204;
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12'b00010_10_00100: offset = 10'd204;
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12'b00010_10_01000: offset = 15'd216;
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12'b00010_10_01000: offset = 10'd216;
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12'b00010_10_10000: offset = 15'd228;
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12'b00010_10_10000: offset = 10'd228;
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12'b00100_01_00001: offset = 15'd240;
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12'b00100_01_00001: offset = 10'd240;
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12'b00100_01_00010: offset = 15'd252;
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12'b00100_01_00010: offset = 10'd252;
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12'b00100_01_00100: offset = 15'd264;
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12'b00100_01_00100: offset = 10'd264;
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12'b00100_01_01000: offset = 15'd276;
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12'b00100_01_01000: offset = 10'd276;
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12'b00100_01_10000: offset = 15'd288;
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12'b00100_01_10000: offset = 10'd288;
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12'b00100_10_00001: offset = 15'd300;
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12'b00100_10_00001: offset = 10'd300;
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12'b00100_10_00010: offset = 15'd312;
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12'b00100_10_00010: offset = 10'd312;
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12'b00100_10_00100: offset = 15'd324;
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12'b00100_10_00100: offset = 10'd324;
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12'b00100_10_01000: offset = 15'd336;
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12'b00100_10_01000: offset = 10'd336;
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12'b00100_10_10000: offset = 15'd348;
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12'b00100_10_10000: offset = 10'd348;
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12'b01000_01_00001: offset = 15'd360;
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12'b01000_01_00001: offset = 10'd360;
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12'b01000_01_00010: offset = 15'd372;
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12'b01000_01_00010: offset = 10'd372;
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12'b01000_01_00100: offset = 15'd384;
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12'b01000_01_00100: offset = 10'd384;
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12'b01000_01_01000: offset = 15'd396;
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12'b01000_01_01000: offset = 10'd396;
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12'b01000_01_10000: offset = 15'd408;
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12'b01000_01_10000: offset = 10'd408;
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12'b01000_10_00001: offset = 15'd420;
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12'b01000_10_00001: offset = 10'd420;
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12'b01000_10_00010: offset = 15'd432;
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12'b01000_10_00010: offset = 10'd432;
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12'b01000_10_00100: offset = 15'd444;
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12'b01000_10_00100: offset = 10'd444;
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12'b01000_10_01000: offset = 15'd456;
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12'b01000_10_01000: offset = 10'd456;
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12'b01000_10_10000: offset = 15'd468;
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12'b01000_10_10000: offset = 10'd468;
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12'b10000_01_00001: offset = 15'd480;
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12'b10000_01_00001: offset = 10'd480;
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12'b10000_01_00010: offset = 15'd492;
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12'b10000_01_00010: offset = 10'd492;
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12'b10000_01_00100: offset = 15'd504;
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12'b10000_01_00100: offset = 10'd504;
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12'b10000_01_01000: offset = 15'd516;
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12'b10000_01_01000: offset = 10'd516;
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12'b10000_01_10000: offset = 15'd528;
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12'b10000_01_10000: offset = 10'd528;
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12'b10000_10_00001: offset = 15'd540;
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12'b10000_10_00001: offset = 10'd540;
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12'b10000_10_00010: offset = 15'd552;
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12'b10000_10_00010: offset = 10'd552;
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12'b10000_10_00100: offset = 15'd564;
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12'b10000_10_00100: offset = 10'd564;
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12'b10000_10_01000: offset = 15'd576;
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12'b10000_10_01000: offset = 10'd576;
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12'b10000_10_10000: offset = 15'd588;
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12'b10000_10_10000: offset = 10'd588;
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default: offset = 15'd0;
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default: offset = 15'd0;
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endcase;
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endcase;
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end;
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end;
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endmodule
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endmodule
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