/* File Name : reg16.c */
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/* File Name : reg16.c */
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/* Description : The 16-bit register */
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/* Description : The 16-bit register */
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/* Purpose : To be used by GENLIB */
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/* Purpose : To be used by GENLIB */
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/* Date : Aug 22, 2001 */
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/* Date : Aug 22, 2001 */
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/* Version : 1.1 */
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/* Version : 1.1 */
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/* Author : Martadinata A. */
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/* Author : Martadinata A. */
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/* Address : VLSI RG, Dept. of Electrical Engineering ITB, */
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/* Address : VLSI RG, Dept. of Electrical Engineering ITB, */
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/* Bandung, Indonesia */
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/* Bandung, Indonesia */
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/* E-mail : marta@ic.vlsi.itb.ac.id */
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/* E-mail : marta@ic.vlsi.itb.ac.id */
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#include<genlib.h>
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#include<genlib.h>
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main()
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main()
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{
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{
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int i;
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int i;
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DEF_LOFIG("reg16");
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DEF_LOFIG("reg16");
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LOCON("d[0:15]", IN, "d[0:15]" );
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LOCON("d[0:15]", IN, "d[0:15]" );
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LOCON("en", IN, "en" );
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LOCON("en", IN, "en" );
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LOCON("clr", IN, "clr" );
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LOCON("clr", IN, "clr" );
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LOCON("q[0:15]", INOUT, "q[0:15]" );
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LOCON("q[0:15]", INOUT, "q[0:15]" );
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LOCON("vdd", IN, "vdd" );
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LOCON("vdd", IN, "vdd" );
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LOCON("vss", IN, "vss" );
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LOCON("vss", IN, "vss" );
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for(i=0;i<=15;i++)
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for(i=0;i<=15;i++)
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{
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{
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LOINS("d_latch_glopf",NAME("latch%d",i),NAME("d[%d]",i),"en","clr",NAME("q[%d]",i),"vdd","vss",0);
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LOINS("d_latch_glopf",NAME("latch%d",i),NAME("d[%d]",i),"en","clr",NAME("q[%d]",i),"vdd","vss",0);
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}
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}
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SAVE_LOFIG();
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SAVE_LOFIG();
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exit(0);
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exit(0);
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}
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}
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