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////////////////////////////////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// This file is part of the project ////
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//// "instruction_list_pipelined_processor_with_peripherals" ////
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//// ////
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//// http://opencores.org/project,instruction_list_pipelined_processor_with_peripherals ////
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//// ////
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//// ////
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//// Author: ////
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//// - Mahesh Sukhdeo Palve ////
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//// ////
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////////////////////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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////////////////////////////////////////////////////////////////////////////////////////////////
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// 8-bit Pipelined Processor defines
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// 8-bit Pipelined Processor defines
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`define immDataLen 8
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`define immDataLen 8
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// program counter & instruction register
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// program counter & instruction register
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`define instAddrLen 10 // 10-bit address => 1024 inst in rom
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`define instAddrLen 10 // 10-bit address => 1024 inst in rom
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`define instLen 15 // 15-bit fixed-length instructions
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`define instLen 15 // 15-bit fixed-length instructions
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`define instOpCodeLen 5
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`define instOpCodeLen 5
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`define instFieldLen 10
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`define instFieldLen 10
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// control unit
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// control unit
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`define cuStateLen 4 // max 16 states
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`define cuStateLen 4 // max 16 states
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`define END `instOpCodeLen'b0
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`define END `instOpCodeLen'b0
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`define JMP `instOpCodeLen'b1
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`define JMP `instOpCodeLen'b1
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`define Ld `instOpCodeLen'b10
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`define Ld `instOpCodeLen'b10
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`define Ldi `instOpCodeLen'b11
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`define Ldi `instOpCodeLen'b11
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`define ST `instOpCodeLen'b100
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`define ST `instOpCodeLen'b100
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`define ADD `instOpCodeLen'b101
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`define ADD `instOpCodeLen'b101
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`define SUB `instOpCodeLen'b110
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`define SUB `instOpCodeLen'b110
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`define MUL `instOpCodeLen'b111
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`define MUL `instOpCodeLen'b111
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`define DIV `instOpCodeLen'b1000
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`define DIV `instOpCodeLen'b1000
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`define AND `instOpCodeLen'b1001
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`define AND `instOpCodeLen'b1001
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`define OR `instOpCodeLen'b1010
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`define OR `instOpCodeLen'b1010
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`define XOR `instOpCodeLen'b1011
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`define XOR `instOpCodeLen'b1011
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`define GrT `instOpCodeLen'b1100
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`define GrT `instOpCodeLen'b1100
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`define GE `instOpCodeLen'b1101
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`define GE `instOpCodeLen'b1101
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`define EQ `instOpCodeLen'b1110
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`define EQ `instOpCodeLen'b1110
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`define LE `instOpCodeLen'b1111
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`define LE `instOpCodeLen'b1111
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`define LT `instOpCodeLen'b10000
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`define LT `instOpCodeLen'b10000
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`define PRE `instOpCodeLen'b10001
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`define PRE `instOpCodeLen'b10001
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`define ETY `instOpCodeLen'b10010
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`define ETY `instOpCodeLen'b10010
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`define RST `instOpCodeLen'b10011
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`define RST `instOpCodeLen'b10011
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`define LdTC `instOpCodeLen'b10100
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`define LdTC `instOpCodeLen'b10100
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`define LdACC `instOpCodeLen'b10101
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`define LdACC `instOpCodeLen'b10101
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`define UARTrd `instOpCodeLen'b10110
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`define UARTrd `instOpCodeLen'b10110
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`define UARTwr `instOpCodeLen'b10111
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`define UARTwr `instOpCodeLen'b10111
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`define UARTstat `instOpCodeLen'b11000
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`define UARTstat `instOpCodeLen'b11000
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`define SPIxFER `instOpCodeLen'b11001
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`define SPIxFER `instOpCodeLen'b11001
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`define SPIstat `instOpCodeLen'b11010
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`define SPIstat `instOpCodeLen'b11010
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`define SPIwBUF `instOpCodeLen'b11011
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`define SPIwBUF `instOpCodeLen'b11011
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`define SPIrBUF `instOpCodeLen'b11100
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`define SPIrBUF `instOpCodeLen'b11100
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// alu opcodes
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// alu opcodes
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`define aluOpcodeLen 4
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`define aluOpcodeLen 4
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`define AND_alu `aluOpcodeLen'b0
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`define AND_alu `aluOpcodeLen'b0
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`define OR_alu `aluOpcodeLen'b1
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`define OR_alu `aluOpcodeLen'b1
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`define XOR_alu `aluOpcodeLen'b10
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`define XOR_alu `aluOpcodeLen'b10
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`define GT_alu `aluOpcodeLen'b11
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`define GT_alu `aluOpcodeLen'b11
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`define GE_alu `aluOpcodeLen'b100
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`define GE_alu `aluOpcodeLen'b100
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`define EQ_alu `aluOpcodeLen'b101
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`define EQ_alu `aluOpcodeLen'b101
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`define LE_alu `aluOpcodeLen'b110
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`define LE_alu `aluOpcodeLen'b110
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`define LT_alu `aluOpcodeLen'b111
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`define LT_alu `aluOpcodeLen'b111
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`define ADD_alu `aluOpcodeLen'b1000
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`define ADD_alu `aluOpcodeLen'b1000
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`define SUB_alu `aluOpcodeLen'b1001
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`define SUB_alu `aluOpcodeLen'b1001
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`define MUL_alu `aluOpcodeLen'b1010
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`define MUL_alu `aluOpcodeLen'b1010
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`define DIV_alu `aluOpcodeLen'b1011
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`define DIV_alu `aluOpcodeLen'b1011
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`define LD_data `aluOpcodeLen'b1100
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`define LD_data `aluOpcodeLen'b1100
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// bit RAM
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// bit RAM
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`define bitRamAddrLen 7 // 7-bit address
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`define bitRamAddrLen 7 // 7-bit address
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`define bitRamDepth 128 // 2^7 = 128 locations
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`define bitRamDepth 128 // 2^7 = 128 locations
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// byte RAM
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// byte RAM
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`define byteRamLen 8 // 8-bit input
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`define byteRamLen 8 // 8-bit input
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`define byteRamAddrLen 7 // 7-bit address
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`define byteRamAddrLen 7 // 7-bit address
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`define byteRamDepth 128 // 2^7 = 128 locations
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`define byteRamDepth 128 // 2^7 = 128 locations
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// input register
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// input register
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`define inputNumber 128 // 128 inputs
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`define inputNumber 128 // 128 inputs
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`define inputAddrLen 7 // 7-bit address
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`define inputAddrLen 7 // 7-bit address
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// output register
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// output register
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`define outputNumber 128 // 128 outputs
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`define outputNumber 128 // 128 outputs
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`define outputAddrLen 7 // 7-bit address
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`define outputAddrLen 7 // 7-bit address
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// accumulator multiplexer
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// accumulator multiplexer
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`define accMuxSelLen 4 // 2^4 = 16 selections available for accumulator
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`define accMuxSelLen 4 // 2^4 = 16 selections available for accumulator
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`define accMuxSelImmData `accMuxSelLen'b0
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`define accMuxSelImmData `accMuxSelLen'b0
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`define accMuxSelAluOut `accMuxSelLen'b1
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`define accMuxSelAluOut `accMuxSelLen'b1
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`define accMuxSelTcLoad `accMuxSelLen'b10
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`define accMuxSelTcLoad `accMuxSelLen'b10
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`define accMuxSelTcAcc `accMuxSelLen'b11
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`define accMuxSelTcAcc `accMuxSelLen'b11
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`define accMuxSelUartData `accMuxSelLen'b100
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`define accMuxSelUartData `accMuxSelLen'b100
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`define accMuxSelUartStat `accMuxSelLen'b101
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`define accMuxSelUartStat `accMuxSelLen'b101
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`define accMuxSelSpiStat `accMuxSelLen'b110
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`define accMuxSelSpiStat `accMuxSelLen'b110
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`define accMuxSelSpiBuf `accMuxSelLen'b111
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`define accMuxSelSpiBuf `accMuxSelLen'b111
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// operand2 multiplexer
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// operand2 multiplexer
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`define op2MuxSelLen 4 // 2^4 = 16 selections available for op2
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`define op2MuxSelLen 4 // 2^4 = 16 selections available for op2
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`define op2MuxSelInput `op2MuxSelLen'b0
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`define op2MuxSelInput `op2MuxSelLen'b0
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`define op2MuxSelOutput `op2MuxSelLen'b1
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`define op2MuxSelOutput `op2MuxSelLen'b1
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`define op2MuxSelBitRam `op2MuxSelLen'b10
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`define op2MuxSelBitRam `op2MuxSelLen'b10
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`define op2MuxSelByteRam `op2MuxSelLen'b11
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`define op2MuxSelByteRam `op2MuxSelLen'b11
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`define op2MuxSel4 `op2MuxSelLen'b100
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`define op2MuxSel4 `op2MuxSelLen'b100
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`define op2MuxSel5 `op2MuxSelLen'b101
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`define op2MuxSel5 `op2MuxSelLen'b101
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`define op2MuxSel6 `op2MuxSelLen'b110
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`define op2MuxSel6 `op2MuxSelLen'b110
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//-----------------------------------------------------------------------------------------------------
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//-----------------------------------------------------------------------------------------------------
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// peripheral defines
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// peripheral defines
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`define timerAndCounter_peripheral
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`define timerAndCounter_peripheral
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`define UART_peripheral
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`define UART_peripheral
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`define SPI_peripheral
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`define SPI_peripheral
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//-----------------------------------------------------------------------------------------------------
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//-----------------------------------------------------------------------------------------------------
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// Timer-Counter
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// Timer-Counter
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`define tcAccLen 8 // 8-bit accumulated value
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`define tcAccLen 8 // 8-bit accumulated value
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`define tcPresetLen 8 // 8-bit preset value
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`define tcPresetLen 8 // 8-bit preset value
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`define tcAddrLen 4
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`define tcAddrLen 4
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`define tcTypeLen 2 // max 4-types
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`define tcTypeLen 2 // max 4-types
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`define tcNumbers 8 // total 8 modules (4-timers, 4-counters)
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`define tcNumbers 8 // total 8 modules (4-timers, 4-counters)
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`define timerType1 `tcTypeLen'b0
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`define timerType1 `tcTypeLen'b0
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`define timerType2 `tcTypeLen'b1
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`define timerType2 `tcTypeLen'b1
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`define timerType3 `tcTypeLen'b10
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`define timerType3 `tcTypeLen'b10
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`define counterType1 `tcTypeLen'b1
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`define counterType1 `tcTypeLen'b1
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`define counterType2 `tcTypeLen'b10
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`define counterType2 `tcTypeLen'b10
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//-----------------------------------------------------------------------------------------------------
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//-----------------------------------------------------------------------------------------------------
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// UART
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// UART
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`define dataBits 8
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`define dataBits 8
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`define sbTick 16 // ticks for stop bits (16 for 1-stopBit)
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`define sbTick 16 // ticks for stop bits (16 for 1-stopBit)
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`define fifoWidth 4
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`define fifoWidth 4
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`define number_fifo_regs 16
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`define number_fifo_regs 16
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`define fifoCntrWidth 5
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`define fifoCntrWidth 5
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`define fifoDepth 16
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`define fifoDepth 16
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