library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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package mips_pkg is
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package mips_pkg is
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-- FIXME this stuff belongs in the cache module where address decoding is made
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subtype t_addr_decode is std_logic_vector(31 downto 16);
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-- (besides, they should be module generics, not package constants)
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constant ADDR_BOOT : t_addr_decode := X"0000";
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subtype t_addr_decode is std_logic_vector(31 downto 24);
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constant ADDR_XRAM : t_addr_decode := X"8000";
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constant ADDR_BOOT : t_addr_decode := X"00";
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constant ADDR_IO : t_addr_decode := X"2000";
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constant ADDR_XRAM : t_addr_decode := X"80";
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constant ADDR_IO : t_addr_decode := X"20";
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subtype t_addr is std_logic_vector(31 downto 0);
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subtype t_addr is std_logic_vector(31 downto 0);
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subtype t_word is std_logic_vector(31 downto 0);
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subtype t_word is std_logic_vector(31 downto 0);
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subtype t_dword is std_logic_vector(63 downto 0);
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subtype t_dword is std_logic_vector(63 downto 0);
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subtype t_regnum is std_logic_vector(4 downto 0);
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subtype t_regnum is std_logic_vector(4 downto 0);
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type t_rbank is array(0 to 31) of t_word;
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type t_rbank is array(0 to 31) of t_word;
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subtype t_pc is std_logic_vector(31 downto 2);
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subtype t_pc is std_logic_vector(31 downto 2);
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constant ZERO : t_word := (others => '0');
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constant ZERO : t_word := (others => '0');
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type t_alu_control is record
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type t_alu_control is record
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logic_sel : std_logic_vector(1 downto 0);
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logic_sel : std_logic_vector(1 downto 0);
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shift_sel : std_logic_vector(1 downto 0);
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shift_sel : std_logic_vector(1 downto 0);
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shift_amount : std_logic_vector(4 downto 0);
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shift_amount : std_logic_vector(4 downto 0);
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neg_sel : std_logic_vector(1 downto 0);
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neg_sel : std_logic_vector(1 downto 0);
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use_arith : std_logic;
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use_arith : std_logic;
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use_logic : std_logic_vector(1 downto 0);
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use_logic : std_logic_vector(1 downto 0);
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cy_in : std_logic;
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cy_in : std_logic;
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use_slt : std_logic;
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use_slt : std_logic;
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arith_unsigned : std_logic;
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arith_unsigned : std_logic;
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end record t_alu_control;
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end record t_alu_control;
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type t_alu_flags is record
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type t_alu_flags is record
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inp1_lt_zero : std_logic;
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inp1_lt_zero : std_logic;
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inp1_eq_zero : std_logic;
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inp1_eq_zero : std_logic;
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inp1_lt_inp2 : std_logic;
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inp1_lt_inp2 : std_logic;
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inp1_eq_inp2 : std_logic;
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inp1_eq_inp2 : std_logic;
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end record t_alu_flags;
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end record t_alu_flags;
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-- 32-cycle mul/div module control. Bits 4-3 & 1-0 of IR.
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-- 32-cycle mul/div module control. Bits 4-3 & 1-0 of IR.
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subtype t_mult_function is std_logic_vector(3 downto 0);
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subtype t_mult_function is std_logic_vector(3 downto 0);
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constant MULT_NOTHING : t_mult_function := "0000";
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constant MULT_NOTHING : t_mult_function := "0000";
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constant MULT_READ_LO : t_mult_function := "1010"; -- 18
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constant MULT_READ_LO : t_mult_function := "1010"; -- 18
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constant MULT_READ_HI : t_mult_function := "1000"; -- 16
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constant MULT_READ_HI : t_mult_function := "1000"; -- 16
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constant MULT_WRITE_LO : t_mult_function := "1011"; -- 19
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constant MULT_WRITE_LO : t_mult_function := "1011"; -- 19
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constant MULT_WRITE_HI : t_mult_function := "1001"; -- 17
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constant MULT_WRITE_HI : t_mult_function := "1001"; -- 17
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constant MULT_MULT : t_mult_function := "1101"; -- 25
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constant MULT_MULT : t_mult_function := "1101"; -- 25
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constant MULT_SIGNED_MULT : t_mult_function := "1100"; -- 24
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constant MULT_SIGNED_MULT : t_mult_function := "1100"; -- 24
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constant MULT_DIVIDE : t_mult_function := "1111"; -- 26
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constant MULT_DIVIDE : t_mult_function := "1111"; -- 26
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constant MULT_SIGNED_DIVIDE : t_mult_function := "1110"; -- 27
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constant MULT_SIGNED_DIVIDE : t_mult_function := "1110"; -- 27
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-- Computes ceil(log2(A)), e.g. address width of memory block
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-- Computes ceil(log2(A)), e.g. address width of memory block
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-- CAN BE USED IN SYNTHESIZABLE CODE as long as called with constant arguments
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-- CAN BE USED IN SYNTHESIZABLE CODE as long as called with constant arguments
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function log2(A : natural) return natural;
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function log2(A : natural) return natural;
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-- Return '1' if address A is within a given memory area
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-- CAN BE USED IN SYNTHESIZABLE CODE as long as called with constant arguments
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function addr_decode(A : std_logic_vector; mask : t_addr_decode) return std_logic;
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end package;
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end package;
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package body mips_pkg is
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package body mips_pkg is
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function log2(A : natural) return natural is
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function log2(A : natural) return natural is
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begin
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begin
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for I in 1 to 30 loop -- Works for up to 32 bit integers
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for I in 1 to 30 loop -- Works for up to 32 bit integers
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if(2**I > A) then
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if(2**I > A) then
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return(I-1);
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return(I-1);
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end if;
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end if;
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end loop;
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end loop;
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return(30);
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return(30);
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end function log2;
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end function log2;
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function addr_decode(A : std_logic_vector; mask : t_addr_decode) return std_logic is
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begin
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if A(mask'high downto mask'low) = mask then
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return '1';
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else
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return '0';
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end if;
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end function addr_decode;
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end package body;
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end package body;
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