-- IOTA Pearl Diver VHDL Port
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-- IOTA Pearl Diver VHDL Port
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--
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--
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-- Written 2018 by Thomas Pototschnig <microengineer18@gmail.com>
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-- 2018 by Thomas Pototschnig <microengineer18@gmail.com,
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--
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-- http://microengineer.eu
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-- This source code is currently licensed under
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-- discord: pmaxuw#8292
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-- Attribution-NonCommercial 4.0 International (CC BY-NC 4.0)
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--
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--
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-- Permission is hereby granted, free of charge, to any person obtaining
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-- http://www.microengineer.eu
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-- a copy of this software and associated documentation files (the
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--
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-- "Software"), to deal in the Software without restriction, including
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-- If you like my project please consider a donation to
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-- without limitation the rights to use, copy, modify, merge, publish,
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--
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-- distribute, sublicense, and/or sell copies of the Software, and to
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-- LLEYMHRKXWSPMGCMZFPKKTHSEMYJTNAZXSAYZGQUEXLXEEWPXUNWBFDWESOJVLHQHXOPQEYXGIRBYTLRWHMJAOSHUY
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-- permit persons to whom the Software is furnished to do so, subject to
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--
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-- the following conditions:
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-- As soon as donations reach 1000MIOTA, everything will become
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--
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-- GPL and open for any use - commercial included.
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-- The above copyright notice and this permission notice shall be
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-- included in all copies or substantial portions of the Software.
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--
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-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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-- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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-- NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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-- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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-- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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-- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWAR
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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use work.index_table.all;
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use work.index_table.all;
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entity curl is
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entity curl is
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generic
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generic
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(
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(
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HASH_LENGTH : integer := 243;
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HASH_LENGTH : integer := 243;
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STATE_LENGTH : integer := 729; -- 3 * HASH_LENGTH;
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STATE_LENGTH : integer := 729; -- 3 * HASH_LENGTH;
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NONCE_LENGTH : integer := 81; -- HASH_LENGTH / 3;
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NONCE_LENGTH : integer := 81; -- HASH_LENGTH / 3;
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NUMBER_OF_ROUNDS : integer := 81;
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NUMBER_OF_ROUNDS : integer := 81;
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PARALLEL : integer := 5;
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PARALLEL : integer := 5;
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INTERN_NONCE_LENGTH : integer := 32;
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INTERN_NONCE_LENGTH : integer := 32;
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BITS_MIN_WEIGHT_MAGINUTE_MAX : integer := 26;
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BITS_MIN_WEIGHT_MAGINUTE_MAX : integer := 26;
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DATA_WIDTH : integer := 9;
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DATA_WIDTH : integer := 9;
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NONCE_OFFSET : integer := 162 -- we hope it nevery changes
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NONCE_OFFSET : integer := 162 -- we hope it nevery changes
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);
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);
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port
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port
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(
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(
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clk : in std_logic;
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clk : in std_logic;
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clk_slow : in std_logic;
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clk_slow : in std_logic;
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reset : in std_logic;
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reset : in std_logic;
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spi_data_rx : in std_logic_vector(31 downto 0);
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spi_data_rx : in std_logic_vector(31 downto 0);
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spi_data_tx : out std_logic_vector(31 downto 0);
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spi_data_tx : out std_logic_vector(31 downto 0);
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spi_data_rxen : in std_logic;
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spi_data_rxen : in std_logic;
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overflow : out std_logic;
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overflow : out std_logic;
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running : out std_logic;
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running : out std_logic;
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found : out std_logic
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found : out std_logic
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);
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);
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end curl;
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end curl;
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architecture behv of curl is
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architecture behv of curl is
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subtype state_vector_type is std_logic_vector(PARALLEL-1 downto 0);
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subtype state_vector_type is std_logic_vector(PARALLEL-1 downto 0);
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subtype mid_state_vector_type is std_logic_vector(DATA_WIDTH-1 downto 0);
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subtype mid_state_vector_type is std_logic_vector(DATA_WIDTH-1 downto 0);
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subtype min_weight_magnitude_type is std_logic_vector(BITS_MIN_WEIGHT_MAGINUTE_MAX-1 downto 0);
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subtype min_weight_magnitude_type is std_logic_vector(BITS_MIN_WEIGHT_MAGINUTE_MAX-1 downto 0);
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type curl_state_array is array(integer range <>) of state_vector_type;
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type curl_state_array is array(integer range <>) of state_vector_type;
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type mid_state_array is array(integer range <>) of mid_state_vector_type;
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type mid_state_array is array(integer range <>) of mid_state_vector_type;
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type min_weight_magnitude_array is array(integer range<>) of min_weight_magnitude_type;
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type min_weight_magnitude_array is array(integer range<>) of min_weight_magnitude_type;
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signal curl_state_low : curl_state_array(STATE_LENGTH-1 downto 0);
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signal curl_state_low : curl_state_array(STATE_LENGTH-1 downto 0);
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signal curl_state_high : curl_state_array(STATE_LENGTH-1 downto 0);
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signal curl_state_high : curl_state_array(STATE_LENGTH-1 downto 0);
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-- mid state data in 9bit packed format
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-- mid state data in 9bit packed format
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signal curl_mid_state_low : mid_state_array((STATE_LENGTH/9)-1 downto 0);
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signal curl_mid_state_low : mid_state_array((STATE_LENGTH/9)-1 downto 0);
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signal curl_mid_state_high : mid_state_array((STATE_LENGTH/9)-1 downto 0);
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signal curl_mid_state_high : mid_state_array((STATE_LENGTH/9)-1 downto 0);
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signal flag_running : std_logic := '0';
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signal flag_running : std_logic := '0';
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signal flag_overflow : std_logic := '0';
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signal flag_overflow : std_logic := '0';
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signal flag_found : std_logic := '0';
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signal flag_found : std_logic := '0';
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signal flag_start : std_logic := '0';
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signal flag_start : std_logic := '0';
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signal binary_nonce : unsigned(INTERN_NONCE_LENGTH-1 downto 0);
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signal binary_nonce : unsigned(INTERN_NONCE_LENGTH-1 downto 0);
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signal mask : state_vector_type;
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signal mask : state_vector_type;
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signal min_weight_magnitude : min_weight_magnitude_type;
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signal min_weight_magnitude : min_weight_magnitude_type;
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function expand(b : std_logic)
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function expand(b : std_logic)
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return state_vector_type is
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return state_vector_type is
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begin
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begin
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if b = '1' then
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if b = '1' then
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return (others => '1');
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return (others => '1');
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else
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else
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return (others => '0');
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return (others => '0');
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end if;
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end if;
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end expand;
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end expand;
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begin
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begin
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overflow <= flag_overflow;
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overflow <= flag_overflow;
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running <= flag_running;
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running <= flag_running;
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found <= flag_found;
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found <= flag_found;
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process (clk_slow)
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process (clk_slow)
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-- because it looks prettier
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-- because it looks prettier
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variable spi_cmd : std_logic_vector(5 downto 0);
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variable spi_cmd : std_logic_vector(5 downto 0);
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variable addrptr : unsigned(7 downto 0) := x"00";
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variable addrptr : unsigned(7 downto 0) := x"00";
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begin
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begin
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if rising_edge(clk_slow) then
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if rising_edge(clk_slow) then
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if reset='1' then
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if reset='1' then
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min_weight_magnitude <= (others => '0');
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min_weight_magnitude <= (others => '0');
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flag_start <= '0';
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flag_start <= '0';
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spi_data_tx <= (others => '0');
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spi_data_tx <= (others => '0');
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-- curl_mid_state_low <= (others => (others => '0'));
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-- curl_mid_state_low <= (others => (others => '0'));
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-- curl_mid_state_high <= (others => (others => '0'));
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-- curl_mid_state_high <= (others => (others => '0'));
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addrptr := x"00";
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addrptr := x"00";
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else
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else
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flag_start <= '0';
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flag_start <= '0';
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-- new spi data received
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-- new spi data received
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if spi_data_rxen = '1' then
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if spi_data_rxen = '1' then
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spi_cmd := spi_data_rx(31 downto 26);
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spi_cmd := spi_data_rx(31 downto 26);
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case spi_cmd is
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case spi_cmd is
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when "000000" => -- nop (mainly for reading back data)
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when "000000" => -- nop (mainly for reading back data)
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when "100001" => -- start / stop
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when "100001" => -- start / stop
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flag_start <= spi_data_rx(0);
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flag_start <= spi_data_rx(0);
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when "100101" => -- write to wr address
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when "100101" => -- write to wr address
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addrptr := unsigned(spi_data_rx(7 downto 0));
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addrptr := unsigned(spi_data_rx(7 downto 0));
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when "100010" => -- write to mid state
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when "100010" => -- write to mid state
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if (addrptr <= (STATE_LENGTH/9)-1) then
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if (addrptr <= (STATE_LENGTH/9)-1) then
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curl_mid_state_low(to_integer(addrptr)) <= spi_data_rx(DATA_WIDTH-1 downto 0);
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curl_mid_state_low(to_integer(addrptr)) <= spi_data_rx(DATA_WIDTH-1 downto 0);
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curl_mid_state_high(to_integer(addrptr)) <= spi_data_rx(DATA_WIDTH+8 downto DATA_WIDTH);
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curl_mid_state_high(to_integer(addrptr)) <= spi_data_rx(DATA_WIDTH+8 downto DATA_WIDTH);
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end if;
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end if;
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spi_data_tx <= spi_data_rx;
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spi_data_tx <= spi_data_rx;
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addrptr := addrptr + 1;
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addrptr := addrptr + 1;
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when "100100" =>
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when "100100" =>
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min_weight_magnitude <= spi_data_rx(BITS_MIN_WEIGHT_MAGINUTE_MAX-1 downto 0);
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min_weight_magnitude <= spi_data_rx(BITS_MIN_WEIGHT_MAGINUTE_MAX-1 downto 0);
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when "000001" => -- read flags
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when "000001" => -- read flags
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spi_data_tx(2 downto 0) <= flag_overflow & flag_found & flag_running;
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spi_data_tx(2 downto 0) <= flag_overflow & flag_found & flag_running;
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-- for debugging onle ... read back curl_state
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-- for debugging onle ... read back curl_state
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-- when "000010" =>
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-- when "000010" =>
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-- spi_addr := spi_data_rx(25 downto 16);
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-- spi_addr := spi_data_rx(25 downto 16);
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-- spi_data_tx(0+PARALLEL-1 downto 0) <= curl_state_low(to_integer(unsigned(spi_addr)));
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-- spi_data_tx(0+PARALLEL-1 downto 0) <= curl_state_low(to_integer(unsigned(spi_addr)));
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-- spi_data_tx(8+PARALLEL-1 downto 8) <= curl_state_high(to_integer(unsigned(spi_addr)));
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-- spi_data_tx(8+PARALLEL-1 downto 8) <= curl_state_high(to_integer(unsigned(spi_addr)));
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-- for debugging only ... read back mid_state
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-- for debugging only ... read back mid_state
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-- when "000111" =>
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-- when "000111" =>
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-- if (addrptr <= (STATE_LENGTH/9)-1) then
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-- if (addrptr <= (STATE_LENGTH/9)-1) then
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-- spi_data_tx(DATA_WIDTH-1 downto 0) <= curl_mid_state_low(to_integer(addrptr));
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-- spi_data_tx(DATA_WIDTH-1 downto 0) <= curl_mid_state_low(to_integer(addrptr));
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-- spi_data_tx(DATA_WIDTH+8 downto DATA_WIDTH) <= curl_mid_state_high(to_integer(addrptr));
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-- spi_data_tx(DATA_WIDTH+8 downto DATA_WIDTH) <= curl_mid_state_high(to_integer(addrptr));
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-- else
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-- else
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-- spi_data_tx <= (others => '0');
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-- spi_data_tx <= (others => '0');
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-- end if;
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-- end if;
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-- addrptr := addrptr + 1; -- dual-used for debugging purposes
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-- addrptr := addrptr + 1; -- dual-used for debugging purposes
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when "000011" => -- read nonce
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when "000011" => -- read nonce
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spi_data_tx(INTERN_NONCE_LENGTH-1 downto 0) <= std_logic_vector(binary_nonce);
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spi_data_tx(INTERN_NONCE_LENGTH-1 downto 0) <= std_logic_vector(binary_nonce);
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when "000100" => -- read mask
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when "000100" => -- read mask
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spi_data_tx(PARALLEL-1 downto 0) <= mask;
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spi_data_tx(PARALLEL-1 downto 0) <= mask;
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when "010101" => -- loop back read test inverted bits
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when "010101" => -- loop back read test inverted bits
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spi_data_tx <= not spi_data_rx;
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spi_data_tx <= not spi_data_rx;
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when "000110" => -- read back parallel-level
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when "000110" => -- read back parallel-level
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spi_data_tx(3 downto 0) <= std_logic_vector(to_unsigned(PARALLEL, 4));
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spi_data_tx(3 downto 0) <= std_logic_vector(to_unsigned(PARALLEL, 4));
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when others =>
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when others =>
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spi_data_tx <= (others => '1');
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spi_data_tx <= (others => '1');
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end case;
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end case;
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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process (clk)
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process (clk)
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variable state : integer range 0 to 31 := 0;
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variable state : integer range 0 to 31 := 0;
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variable round : integer range 0 to 127 := 0;
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variable round : integer range 0 to 127 := 0;
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variable imask : state_vector_type;
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variable imask : state_vector_type;
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variable i_min_weight_magnitude : min_weight_magnitude_type;
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variable i_min_weight_magnitude : min_weight_magnitude_type;
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variable tmp_weight_magnitude : min_weight_magnitude_array(0 to PARALLEL-1);
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variable tmp_weight_magnitude : min_weight_magnitude_array(0 to PARALLEL-1);
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variable i_binary_nonce : unsigned(INTERN_NONCE_LENGTH-1 downto 0);
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variable i_binary_nonce : unsigned(INTERN_NONCE_LENGTH-1 downto 0);
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-- temporary registers get optimized away
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-- temporary registers get optimized away
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variable alpha : curl_state_array(STATE_LENGTH-1 downto 0);
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variable alpha : curl_state_array(STATE_LENGTH-1 downto 0);
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variable beta : curl_state_array(STATE_LENGTH-1 downto 0);
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variable beta : curl_state_array(STATE_LENGTH-1 downto 0);
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variable gamma : curl_state_array(STATE_LENGTH-1 downto 0);
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variable gamma : curl_state_array(STATE_LENGTH-1 downto 0);
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variable delta : curl_state_array(STATE_LENGTH-1 downto 0);
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variable delta : curl_state_array(STATE_LENGTH-1 downto 0);
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variable tmp_index : integer range 0 to 1023;
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variable tmp_index : integer range 0 to 1023;
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variable tmp_highest_bit : integer range 0 to 31;
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variable tmp_highest_bit : integer range 0 to 31;
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begin
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begin
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if rising_edge(clk) then
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if rising_edge(clk) then
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if reset='1' then
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if reset='1' then
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state := 0;
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state := 0;
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round := 0;
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round := 0;
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flag_found <= '0';
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flag_found <= '0';
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flag_running <= '0';
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flag_running <= '0';
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flag_overflow <= '0';
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flag_overflow <= '0';
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binary_nonce <= (others => '0');
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binary_nonce <= (others => '0');
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mask <= (others => '0');
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mask <= (others => '0');
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-- curl_state_low <= (others => (others => '0'));
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-- curl_state_low <= (others => (others => '0'));
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-- curl_state_high <= (others => (others => '0'));
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-- curl_state_high <= (others => (others => '0'));
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-- tmp_weight_magnitude := (others => (others => '0'));
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-- tmp_weight_magnitude := (others => (others => '0'));
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i_binary_nonce := (others => '0');
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i_binary_nonce := (others => '0');
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imask := (others => '0');
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imask := (others => '0');
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i_min_weight_magnitude := (others => '0');
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i_min_weight_magnitude := (others => '0');
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alpha := (others => (others => '0'));
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alpha := (others => (others => '0'));
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beta := (others => (others => '0'));
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beta := (others => (others => '0'));
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gamma := (others => (others => '0'));
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gamma := (others => (others => '0'));
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delta := (others => (others => '0'));
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delta := (others => (others => '0'));
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tmp_index := 0;
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tmp_index := 0;
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else
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else
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case state is
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case state is
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when 0 =>
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when 0 =>
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mask <= imask;
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mask <= imask;
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binary_nonce <= i_binary_nonce;
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binary_nonce <= i_binary_nonce;
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flag_running <= '0';
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flag_running <= '0';
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if flag_start = '1' then
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if flag_start = '1' then
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i_binary_nonce := x"00000000";
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i_binary_nonce := x"00000000";
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i_min_weight_magnitude := min_weight_magnitude;
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i_min_weight_magnitude := min_weight_magnitude;
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state := 1;
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state := 1;
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end if;
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end if;
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-- nop until start from spi
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-- nop until start from spi
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when 1 =>
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when 1 =>
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flag_found <= '0';
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flag_found <= '0';
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flag_running <= '1';
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flag_running <= '1';
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flag_overflow <= '0';
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flag_overflow <= '0';
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state := 8;
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state := 8;
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when 8 => -- copy mid state and insert nonce
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when 8 => -- copy mid state and insert nonce
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-- copy and fully expand mid-state to curl-state
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-- copy and fully expand mid-state to curl-state
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for I in 0 to (STATE_LENGTH/DATA_WIDTH)-1 loop
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for I in 0 to (STATE_LENGTH/DATA_WIDTH)-1 loop
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for J in 0 to DATA_WIDTH-1 loop
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for J in 0 to DATA_WIDTH-1 loop
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tmp_index := I*DATA_WIDTH+J;
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tmp_index := I*DATA_WIDTH+J;
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if tmp_index < NONCE_OFFSET or tmp_index > NONCE_OFFSET + NONCE_LENGTH - 1 then
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if tmp_index < NONCE_OFFSET or tmp_index > NONCE_OFFSET + NONCE_LENGTH - 1 then
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curl_state_low(tmp_index) <= expand(curl_mid_state_low(I)(J));
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curl_state_low(tmp_index) <= expand(curl_mid_state_low(I)(J));
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curl_state_high(tmp_index) <= expand(curl_mid_state_high(I)(J));
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curl_state_high(tmp_index) <= expand(curl_mid_state_high(I)(J));
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end if;
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end if;
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end loop;
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end loop;
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end loop;
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end loop;
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-- fill all ... synthesizer is smart enough to optimize away what is not needed
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-- fill all ... synthesizer is smart enough to optimize away what is not needed
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for I in NONCE_OFFSET to NONCE_OFFSET + NONCE_LENGTH - 1 loop
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for I in NONCE_OFFSET to NONCE_OFFSET + NONCE_LENGTH - 1 loop
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curl_state_low(I) <= expand('1');
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curl_state_low(I) <= expand('1');
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curl_state_high(I) <= expand('1');
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curl_state_high(I) <= expand('1');
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end loop;
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end loop;
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-- calculate log2(x) by determining the place of highest set bit
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-- calculate log2(x) by determining the place of highest set bit
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-- this is calculated on constants, so no logic needed
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-- this is calculated on constants, so no logic needed
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tmp_highest_bit := 0;
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tmp_highest_bit := 0;
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for I in 0 to 31 loop -- 32 is enough ...^^
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for I in 0 to 31 loop -- 32 is enough ...^^
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if to_unsigned(PARALLEL-1, 32)(I) = '1' then
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if to_unsigned(PARALLEL-1, 32)(I) = '1' then
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tmp_highest_bit := I;
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tmp_highest_bit := I;
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end if;
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end if;
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end loop;
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end loop;
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-- -- generate bitmuster in first trit-arrays of nonce depending on PARALLEL setting
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-- -- generate bitmuster in first trit-arrays of nonce depending on PARALLEL setting
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-- this is calculated on constants, so no logic needed
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-- this is calculated on constants, so no logic needed
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for I in 0 to PARALLEL-1 loop
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for I in 0 to PARALLEL-1 loop
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for J in 0 to tmp_highest_bit loop
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for J in 0 to tmp_highest_bit loop
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curl_state_low(NONCE_OFFSET+J)(I) <= to_unsigned(I, tmp_highest_bit+1)(J);
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curl_state_low(NONCE_OFFSET+J)(I) <= to_unsigned(I, tmp_highest_bit+1)(J);
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curl_state_high(NONCE_OFFSET+J)(I) <= not to_unsigned(I, tmp_highest_bit+1)(J);
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curl_state_high(NONCE_OFFSET+J)(I) <= not to_unsigned(I, tmp_highest_bit+1)(J);
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end loop;
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end loop;
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end loop;
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end loop;
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-- insert and convert binary nonce to ternary nonce
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-- insert and convert binary nonce to ternary nonce
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-- It's a fake ternary nonce but integer-values are strictly monotonously rising
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-- It's a fake ternary nonce but integer-values are strictly monotonously rising
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-- with integer values of binary nonce.
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-- with integer values of binary nonce.
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-- Doesn't bring the exact same result like reference implementation with real
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-- Doesn't bring the exact same result like reference implementation with real
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-- ternary adder - but it doesn't matter and it is way faster.
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-- ternary adder - but it doesn't matter and it is way faster.
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-- conveniently put nonce counter at the end of nonce
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-- conveniently put nonce counter at the end of nonce
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for I in 0 to INTERN_NONCE_LENGTH-1 loop
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for I in 0 to INTERN_NONCE_LENGTH-1 loop
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curl_state_low(NONCE_OFFSET + NONCE_LENGTH - INTERN_NONCE_LENGTH + I) <= expand(i_binary_nonce(I));
|
curl_state_low(NONCE_OFFSET + NONCE_LENGTH - INTERN_NONCE_LENGTH + I) <= expand(i_binary_nonce(I));
|
curl_state_high(NONCE_OFFSET + NONCE_LENGTH - INTERN_NONCE_LENGTH + I) <= not expand(i_binary_nonce(I));
|
curl_state_high(NONCE_OFFSET + NONCE_LENGTH - INTERN_NONCE_LENGTH + I) <= not expand(i_binary_nonce(I));
|
end loop;
|
end loop;
|
|
|
-- initialize round-counter
|
-- initialize round-counter
|
round := NUMBER_OF_ROUNDS;
|
round := NUMBER_OF_ROUNDS;
|
|
|
state := 10;
|
state := 10;
|
when 10 => -- do the curl hash round without any copying needed
|
when 10 => -- do the curl hash round without any copying needed
|
if round = 1 then
|
if round = 1 then
|
state := 16;
|
state := 16;
|
end if;
|
end if;
|
for I in 0 to STATE_LENGTH-1 loop
|
for I in 0 to STATE_LENGTH-1 loop
|
alpha(I) := curl_state_low(index_table(I));
|
alpha(I) := curl_state_low(index_table(I));
|
beta(I) := curl_state_high(index_table(I));
|
beta(I) := curl_state_high(index_table(I));
|
gamma(I) := curl_state_high(index_table(I+1));
|
gamma(I) := curl_state_high(index_table(I+1));
|
|
|
delta(I) := (alpha(I) or (not gamma(I))) and (curl_state_low(index_table(I+1)) xor beta(I));
|
delta(I) := (alpha(I) or (not gamma(I))) and (curl_state_low(index_table(I+1)) xor beta(I));
|
|
|
curl_state_low(I) <= not delta(I);
|
curl_state_low(I) <= not delta(I);
|
curl_state_high(I) <= (alpha(I) xor gamma(I)) or delta(I);
|
curl_state_high(I) <= (alpha(I) xor gamma(I)) or delta(I);
|
end loop;
|
end loop;
|
round := round - 1;
|
round := round - 1;
|
when 16 => -- find out which solution - if any
|
when 16 => -- find out which solution - if any
|
imask := (others => '0');
|
imask := (others => '0');
|
|
|
-- transform "vertical" trits to "horizontal" bits
|
-- transform "vertical" trits to "horizontal" bits
|
-- and compare with min weight magnitude mask
|
-- and compare with min weight magnitude mask
|
for I in 0 to PARALLEL-1 loop
|
for I in 0 to PARALLEL-1 loop
|
tmp_weight_magnitude(I) := (others => '0');
|
tmp_weight_magnitude(I) := (others => '0');
|
for J in 0 to BITS_MIN_WEIGHT_MAGINUTE_MAX-1 loop
|
for J in 0 to BITS_MIN_WEIGHT_MAGINUTE_MAX-1 loop
|
tmp_weight_magnitude(I)(J) := curl_state_low(HASH_LENGTH - 1 - J)(I) and curl_state_high(HASH_LENGTH - 1 - J)(I);
|
tmp_weight_magnitude(I)(J) := curl_state_low(HASH_LENGTH - 1 - J)(I) and curl_state_high(HASH_LENGTH - 1 - J)(I);
|
end loop;
|
end loop;
|
tmp_weight_magnitude(I) := tmp_weight_magnitude(I) and i_min_weight_magnitude; -- only consider used bits
|
tmp_weight_magnitude(I) := tmp_weight_magnitude(I) and i_min_weight_magnitude; -- only consider used bits
|
if tmp_weight_magnitude(I) = i_min_weight_magnitude then
|
if tmp_weight_magnitude(I) = i_min_weight_magnitude then
|
imask(I) := '1';
|
imask(I) := '1';
|
end if;
|
end if;
|
end loop;
|
end loop;
|
state := 17;
|
state := 17;
|
when 17 =>
|
when 17 =>
|
if unsigned(imask) /= 0 then
|
if unsigned(imask) /= 0 then
|
state := 30;
|
state := 30;
|
elsif i_binary_nonce = x"ffffffff" then
|
elsif i_binary_nonce = x"ffffffff" then
|
state := 31;
|
state := 31;
|
else
|
else
|
i_binary_nonce := i_binary_nonce + 1;
|
i_binary_nonce := i_binary_nonce + 1;
|
state := 8;
|
state := 8;
|
end if;
|
end if;
|
when 30 =>
|
when 30 =>
|
flag_found <= '1';
|
flag_found <= '1';
|
state := 0;
|
state := 0;
|
when 31 =>
|
when 31 =>
|
flag_overflow <= '1';
|
flag_overflow <= '1';
|
state := 0;
|
state := 0;
|
when others =>
|
when others =>
|
state := 0;
|
state := 0;
|
end case;
|
end case;
|
end if;
|
end if;
|
end if;
|
end if;
|
end process;
|
end process;
|
end behv;
|
end behv;
|
|
|
