-- Author : Julian Andres Guarin Reyes.
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-- Author : Julian Andres Guarin Reyes.
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-- Project : JART, Just Another Ray Tracer.
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-- Project : JART, Just Another Ray Tracer.
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-- email : jguarin2002 at gmail.com, j.guarin at javeriana.edu.co
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-- email : jguarin2002 at gmail.com, j.guarin at javeriana.edu.co
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-- This code was entirely written by Julian Andres Guarin Reyes.
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-- This code was entirely written by Julian Andres Guarin Reyes.
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-- The following code is licensed under GNU Public License
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-- The following code is licensed under GNU Public License
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-- http://www.gnu.org/licenses/gpl-3.0.txt.
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-- http://www.gnu.org/licenses/gpl-3.0.txt.
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-- This file is part of JART (Just Another Ray Tracer).
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-- This file is part of JART (Just Another Ray Tracer).
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-- JART (Just Another Ray Tracer) is free software: you can redistribute it and/or modify
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-- JART (Just Another Ray Tracer) is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- (at your option) any later version.
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-- JART (Just Another Ray Tracer) is distributed in the hope that it will be useful,
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-- JART (Just Another Ray Tracer) is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- You should have received a copy of the GNU General Public License
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-- along with JART (Just Another Ray Tracer). If not, see <http://www.gnu.org/licenses/>.
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-- along with JART (Just Another Ray Tracer). If not, see <http://www.gnu.org/licenses/>.
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-- This is a discriminant proof cell.
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-- This is a discriminant proof cell.
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use work.powerGrid.all;
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use work.powerGrid.all;
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entity kComparisonCell is
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entity kComparisonCell is
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generic (
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generic (
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RK : string := "yes";
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RK : string := "yes";
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W1 : integer := 32
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W1 : integer := 32
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);
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);
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port (
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port (
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clk,rst : in std_logic;
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clk,rst : in std_logic;
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scanOut : in std_logic; -- This signals overrides the 'signed greater or equal than' internal function and allows vdinput to flow upwards.
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scanOut : in std_logic; -- This signals overrides the 'signed greater or equal than' internal function and allows vdinput to flow upwards.
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nxtSphere : in std_logic; -- Controls when the sphere goes to the next Row.
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nxtSphere : in std_logic; -- Controls when the sphere goes to the next Row.
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pipeOn : in std_logic; -- Enables / Disable the upwarding flow.
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pipeOn : in std_logic; -- Enables / Disable the upwarding flow.
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kinput : in std_logic_vector (W1-1 downto 0);
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kinput : in std_logic_vector (W1-1 downto 0);
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koutputhor : out std_logic_vector (W1-1 downto 0);
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koutputhor : out std_logic_vector (W1-1 downto 0);
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koutputver : out std_logic_vector (W1-1 downto 0); -- K input flowing to the next floor upstairs (but waits one clock).
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koutputver : out std_logic_vector (W1-1 downto 0); -- K input flowing to the next floor upstairs (but waits one clock).
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vdinput : in std_logic_vector (W1-1 downto 0); -- V.D input.
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vdinput : in std_logic_vector (W1-1 downto 0); -- V.D input.
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vdoutput : out std_logic_vector (W1-1 downto 0) -- Selected dot product.
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vdoutput : out std_logic_vector (W1-1 downto 0) -- Selected dot product.
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);
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);
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end entity;
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end entity;
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architecture rtl of kComparisonCell is
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architecture rtl of kComparisonCell is
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signal ssge32 : std_logic; -- Signed "Greater or equal than" signal.
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signal ssge32 : std_logic; -- Signed "Greater or equal than" signal.
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signal sena : std_logic; -- Enable internal signal
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signal sena : std_logic; -- Enable internal signal
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signal disc : std_logic;
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signal disc : std_logic;
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begin
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begin
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-- Enable resolution
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-- Enable resolution
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sena <= pipeOn or scanOut;
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sena <= pipeOn or scanOut;
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disc <= ssge32 or scanOut;
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disc <= ssge32 or scanOut;
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-- Enable
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-- Enable
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kcomp : sge32
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kcomp : sge32
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port map (
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port map (
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dataa => vdinput,
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dataa => vdinput,
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datab => kinput,
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datab => kinput,
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AgeB => ssge32
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AgeB => ssge32
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);
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);
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-- When ssge32 (greater or equal signal) is set then V.D > kte, therefore intersection is confirmed and V.D is to be shifted to the distance comparison grid.
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-- When ssge32 (greater or equal signal) is set then V.D > kte, therefore intersection is confirmed and V.D is to be shifted to the distance comparison grid.
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selector : process (rst,clk,sena)
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selector : process (rst,clk,sena)
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begin
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begin
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if rst='0' then
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if rst='0' then
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-- At the beginning set the Maximum over Maximum distance.
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-- At the beginning set the Maximum over Maximum distance.
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vdoutput (W1-1)<= '0';
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vdoutput (W1-1)<= '0';
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vdoutput (W1-2 downto 0) <= (others => '1');
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vdoutput (W1-2 downto 0) <= (others => '1');
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koutputver <= (others => '0');
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koutputver <= (others => '0');
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elsif rising_edge(clk) and sena='1' then
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elsif rising_edge(clk) and sena='1' then
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-- Flowing Upwards of vinput.
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-- Flowing Upwards of vinput.
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koutputver <= kinput;
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koutputver <= kinput;
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if disc='1' then -- If VD ids grater or equal than K .....
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if disc='1' then -- If VD ids grater or equal than K .....
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vdoutput <= vdinput;
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vdoutput <= vdinput;
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else
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else
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vdoutput(W1-1) <= '0';
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vdoutput(W1-1) <= '0';
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vdoutput(W1-2 downto 0)<=( others => '1' );
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vdoutput(W1-2 downto 0)<=( others => '1' );
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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-- Behavioral : When nxtSphere is set, the Sphere and its K constant should go the the next row
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-- Behavioral : When nxtSphere is set, the Sphere and its K constant should go the the next row
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kHorizontalPipeStage : if RK = "yes" generate
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kHorizontalPipeStage : if RK = "yes" generate
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process (clk,rst,nxtSphere)
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process (clk,rst,nxtSphere)
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begin
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begin
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if rst='0' then
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if rst='0' then
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koutputhor <= (others => '0');
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koutputhor <= (others => '0');
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elsif rising_edge(clk) and nxtSphere ='1' then
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elsif rising_edge(clk) and nxtSphere ='1' then
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koutputhor <= kinput;
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koutputhor <= kinput;
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end if;
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end if;
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end process;
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end process;
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end generate kHorizontalPipeStage;
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end generate kHorizontalPipeStage;
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end rtl;
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end rtl;
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