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The test programs have been assembled with TASM (Telemark Cross Assembler),
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The test programs have been assembled with TASM (Telemark Cross Assembler),
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a free assembler available for DOS and Linux.
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a free assembler available for DOS and Linux.
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A few Modelsim simulation scripts are included to assist in running the test
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A few Modelsim simulation scripts are included to assist in running the test
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benches with that simulator. They are in the synthesis directory.
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benches with that simulator. They are in the synthesis directory.
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The scripts expect that Modelsim's current directory is the synthesis directory.
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The scripts expect that Modelsim's current directory is the synthesis directory.
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(you can change the working directory with 'File'->'change directory').
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(you can change the working directory with 'File'->'change directory').
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If you don't use Modelsim standalone but from within an IDE, there's a couple
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If you don't use Modelsim standalone but from within an IDE, there's a couple
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of independent scripts to help you organize the test signals.
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of independent scripts to help you organize the test signals.
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A CP/M port for a Cyclone 2 starter board will eventually be included as a demo.
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A CP/M port for a Cyclone 2 starter board will eventually be included as a demo.
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It is still incomplete (a lot of necessary files haven't yet been uploaded to
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It is still incomplete (a lot of necessary files haven't yet been uploaded to
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SVN) and unfinished.
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SVN) and unfinished.
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FILE LIST
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FILE LIST
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==========
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==========
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vhdl\light8080.vhdl Core source (single file)
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vhdl\light8080.vhdl Core source (single file)
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vhdl\test\light8080_tb0.vhdl Test bench 0 (Kelly test)
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vhdl\test\light8080_tb0.vhdl Test bench 0 (Kelly test)
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vhdl\test\light8080_tb1.vhdl Test bench 1 (Interrupts)
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vhdl\test\light8080_tb1.vhdl Test bench 1 (Interrupts)
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vhdl\demo\cs2b_4kbasic_cpu.vhdl altair 4K Basic demo on DE-1 board
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vhdl\demo\cs2b_4kbasic_cpu.vhdl altair 4K Basic demo on DE-1 board
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vhdl\demo\cs2b_4kbasic_rom.vhdl ROM/RAM for 4K Basic demo
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vhdl\demo\cs2b_4kbasic_rom.vhdl ROM/RAM for 4K Basic demo
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vhdl\demo\rs232_tx.vhdl Serial tx code for demo
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vhdl\demo\rs232_tx.vhdl Serial tx code for demo
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vhdl\demo\rs232_rx.vhdl Serial rx code for demo
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vhdl\demo\rs232_rx.vhdl Serial rx code for demo
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vhdl\demo\c2sb_4kbasic.csv Pin assignment file for Quartus II
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vhdl\demo\c2sb_4kbasic.csv Pin assignment file for Quartus II
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util\uasm.pl Microcode assembler
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util\uasm.pl Microcode assembler
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util\microrom.bat Sample DOS bat file for assembler
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util\microrom.bat Sample DOS bat file for assembler
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ucode\light8080.m80 Microcode source file
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ucode\light8080.m80 Microcode source file
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synthesis\sim_tb0.do Modelsim script for test bench 0
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synthesis\sim_tb0.do Modelsim script for test bench 0
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synthesis\sim_tb1.do Modelsim script for test bench 1
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synthesis\sim_tb1.do Modelsim script for test bench 1
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synthesis\tb0_modelsim_wave.do Script with wave format and colors, tb0
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synthesis\tb0_modelsim_wave.do Script with wave format and colors, tb0
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synthesis\tb1_modelsim_wave.do Script with wave format and colors, tb1
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synthesis\tb1_modelsim_wave.do Script with wave format and colors, tb1
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doc\designNotes.tex Core documentation in LaTeX format
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doc\designNotes.tex Core documentation in LaTeX format
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doc\designNotes.pdf Core documentation in PDF format
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doc\designNotes.pdf Core documentation in PDF format
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asm\tb0.asm Test bench 0 program assembler source
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asm\tb0.asm Test bench 0 program assembler source
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asm\tb1.asm Test bench 1 program assembler source
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asm\tb1.asm Test bench 1 program assembler source
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asm\hexconv.pl Intel HEX to VHDL converter
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asm\hexconv.pl Intel HEX to VHDL converter
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asm\tasmtb.bat BATCH script to build the test benches
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asm\tasmtb.bat BATCH script to build the test benches
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asm\readme.txt How to assemble the sources
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asm\readme.txt How to assemble the sources
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verilog\rtl\ contains the Verilog files of the light8080 CPU and SOC
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verilog\bench\ Verilog light8080 SOC testbench
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verilog\sim\icarus files used for Verilog simulation using Icaru Verilog
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verilog\syn\altera_c2 Altera Quartus project file ucing Cyclone II FPGA
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verilog\syn\xilinx_s3 Xilinx ISE project file ucing Spartan 3 FPGA
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c\ Hello World Small-C light8080 SOC sample
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tools\c80\ C80 compiler and AS80 assembler tools used to compile
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the C example program. The c80.exe executable was compiled
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using tcc (Tiny C Compiler).
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tools\ihex2vlog\ Intel HEX to Verilog tool used to generate the Verilog
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program & RAM memory file used by the verilog SOC.
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The ihex2vlog.exe executable was compiled using tcc
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(Tiny C Compiler).
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