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[/] [line_codes/] [trunk/] [doc/] [RUNNING.txt] - Diff between revs 4 and 8

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Rev 4 Rev 8
Present in bench/vhdl are files showing simple usage examples of
Present in bench/vhdl are files showing simple usage examples of
the line codes examples. This files shows how to test them.
the line codes examples. This files shows how to test them.
these running simulation examples requires ghdl and gtkwave for
these running simulation examples requires ghdl and gtkwave for
viewing vcd files. If you're going to use another VHDL simulator,
viewing vcd files. If you're going to use another VHDL simulator,
this can be useful:
this can be useful:
ghdl -a file.vhd
ghdl -a file.vhd
 means analyse:
 means analyse:
 http://ghdl.free.fr/ghdl/Analysis-command.html
 http://ghdl.free.fr/ghdl/Analysis-command.html
ghdl -e file
ghdl -e file
 mean elaborate:
 mean elaborate:
 http://ghdl.free.fr/ghdl/Elaboration-command.html
 http://ghdl.free.fr/ghdl/Elaboration-command.html
ghdl -r file or ./file
ghdl -r file or ./file
 means run:
 means run:
 http://ghdl.free.fr/ghdl/Run-command.html
 http://ghdl.free.fr/ghdl/Run-command.html
cd bench/vhdl
cd bench/vhdl
1. Simulating the AMI decoder.
1. Simulating the AMI decoder.
ghdl -a ../../rtl/vhdl/ami_dec.vhd
ghdl -a ../../rtl/vhdl/ami_dec.vhd
ghdl -a smlt_ami_dec.vhd
ghdl -a smlt_ami_dec.vhd
ghdl -e smlt_ami_dec
ghdl -e smlt_ami_dec
./smlt_ami_dec --vcd=ad.vcd
./smlt_ami_dec --vcd=ad.vcd
gtkwave ad.vcd
gtkwave ad.vcd
append the signals clk, e0, e1, s, clrb
append the signals clk, e0, e1, s, clrb
clk  -> clock signal.
clk  -> clock signal.
e0   -> input signal #0.
e0   -> input signal #0.
e1   -> input signal #1.
e1   -> input signal #1.
s    -> unique output signal
s    -> unique output signal
clrb -> bar clear signal.
clrb -> bar clear signal.
choose the best fit zoom.
choose the best fit zoom.
cleaning:
cleaning:
rm *.o smlt_ami_dec work-obj93.cf  ad.vcd
rm *.o smlt_ami_dec work-obj93.cf  ad.vcd
2. Simulating the AMI encoder.
2. Simulating the AMI encoder.
ghdl -a ../../rtl/vhdl/ami_enc.vhd
ghdl -a ../../rtl/vhdl/ami_enc.vhd
ghdl -a smlt_ami_enc.vhd
ghdl -a smlt_ami_enc.vhd
ghdl -e smlt_ami_enc
ghdl -e smlt_ami_enc
./smlt_ami_enc --vcd=ae.vcd
./smlt_ami_enc --vcd=ae.vcd
gtkwave ae.vcd
gtkwave ae.vcd
append the signals  clk, e, s0, s1, clrb
append the signals  clk, e, s0, s1, clrb
clk  -> clock signal.
clk  -> clock signal.
e    -> unique input signal
e    -> unique input signal
s0   -> output signal #0.
s0   -> output signal #0.
s1   -> output signal #1.
s1   -> output signal #1.
clrb -> bar clear signal.
clrb -> bar clear signal.
choose the best fit zoom.
choose the best fit zoom.
cleaning:
cleaning:
rm *.o smlt_ami_enc work-obj93.cf  ae.vcd
rm *.o smlt_ami_enc work-obj93.cf  ae.vcd
3. Simulating the HDB1 decoder.
3. Simulating the HDB1 decoder.
ghdl -a ../../rtl/vhdl/hdb1_dec.vhd
ghdl -a ../../rtl/vhdl/hdb1_dec.vhd
ghdl -a smlt_hdb1_dec.vhd
ghdl -a smlt_hdb1_dec.vhd
ghdl -e smlt_hdb1_dec
ghdl -e smlt_hdb1_dec
./smlt_hdb1_dec --vcd=h1d.vcd
./smlt_hdb1_dec --vcd=h1d.vcd
gtkwave h1d.vcd
gtkwave h1d.vcd
append the signals clk, e0, e1, s, clrb
append the signals clk, e0, e1, s, clrb
clk  -> clock signal.
clk  -> clock signal.
e0   -> input signal #0.
e0   -> input signal #0.
e1   -> input signal #1.
e1   -> input signal #1.
s    -> unique output signal
s    -> unique output signal
clrb -> bar clear signal.
clrb -> bar clear signal.
choose the best fit zoom.
choose the best fit zoom.
cleaning:
cleaning:
rm *.o smlt_hdb1_dec work-obj93.cf  h1d.vcd
rm *.o smlt_hdb1_dec work-obj93.cf  h1d.vcd
4. Simulating the HDB1 encoder.
4. Simulating the HDB1 encoder.
ghdl -a ../../rtl/vhdl/hdb1_enc.vhd
ghdl -a ../../rtl/vhdl/hdb1_enc.vhd
ghdl -a smlt_hdb1_enc.vhd
ghdl -a smlt_hdb1_enc.vhd
ghdl -e smlt_hdb1_enc
ghdl -e smlt_hdb1_enc
./smlt_hdb1_enc --vcd=h1e.vcd
./smlt_hdb1_enc --vcd=h1e.vcd
gtkwave h1e.vcd
gtkwave h1e.vcd
append the signals  clk, e, s0, s1, clrb
append the signals  clk, e, s0, s1, clrb
clk  -> clock signal.
clk  -> clock signal.
e    -> unique input signal
e    -> unique input signal
s0   -> output signal #0.
s0   -> output signal #0.
s1   -> output signal #1.
s1   -> output signal #1.
clrb -> bar clear signal.
clrb -> bar clear signal.
choose the best fit zoom.
choose the best fit zoom.
cleaning:
cleaning:
rm *.o smlt_hdb1_enc work-obj93.cf  h1e.vcd
rm *.o smlt_hdb1_enc work-obj93.cf  h1e.vcd
 
 

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