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[/] [line_codes/] [trunk/] [rtl/] [vhdl/] [hdb1_dec.vhd] - Diff between revs 5 and 8
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Rev 8 |
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-- implementation of the HDB1 decoder.
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-- implementation of the HDB1 decoder.
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entity hdb1_dec is
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entity hdb1_dec is
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port (
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port (
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clr_bar,
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clr_bar,
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clk, e0, e1 : in bit; -- inputs.
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clk, e0, e1 : in bit; -- inputs.
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s : out bit -- output.
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s : out bit -- output.
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);
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);
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end hdb1_dec;
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end hdb1_dec;
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architecture behaviour of hdb1_dec is
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architecture behaviour of hdb1_dec is
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signal q0, q1: bit; -- two flipflops.
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signal q0, q1: bit; -- two flipflops.
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begin
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begin
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process (clk, clr_bar) begin
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process (clk, clr_bar) begin
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if clr_bar = '0' then
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if clr_bar = '0' then
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q0 <= '0';
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q0 <= '0';
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q1 <= '0';
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q1 <= '0';
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s <= '0';
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s <= '0';
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elsif clk'event and clk = '1' then
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elsif clk'event and clk = '1' then
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s <= ( q0 and (not e0) ) or ( q1 and (not e1) );
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s <= ( q0 and (not e0) ) or ( q1 and (not e1) );
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q0 <= (not q0) and e0;
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q0 <= (not q0) and e0;
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q1 <= (not q1) and e1;
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q1 <= (not q1) and e1;
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end if;
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end if;
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end process;
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end process;
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end behaviour;
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end behaviour;
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