URL
https://opencores.org/ocsvn/logicprobe/logicprobe/trunk
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Rev 5 |
Rev 19 |
#
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#
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# Makefile to build a simulation of the test circuit
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# Makefile to build a simulation of the test circuit
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#
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#
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all: dump.vcd
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all: dump.vcd
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show: dump.vcd
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show: dump.vcd
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gtkwave dump.vcd top.cfg
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gtkwave dump.vcd top.cfg
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dump.vcd: top
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dump.vcd: top
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./top
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./top
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top: top.v
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top: top.v
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iverilog -Wall -o top top.v
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iverilog -Wall -o top top.v
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clean:
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clean:
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rm -f *~ top dump.vcd
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rm -f *~ top dump.vcd
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