LPFFIR Project README
|
README
|
|
|
|
This file is part of the LowPass Filter with Finite Impulse Response (LPFFIR) project:
|
|
https://opencores.org/projects/lpffir
|
|
|
|
AUTHOR:
|
|
Vladimir Armstrong, vladimirarmstrong@opencores.org
|
|
|
|
DESCRIPTION:
|
|
Implementation of LPFFIR according to specification document:
|
|
./doc/LPFFIR_Specifications.pdf
|
|
|
DIRECTORY STRUCTURE:
|
DIRECTORY STRUCTURE:
|
── bench Top level test bench
|
── bench Top level test bench
|
│ ├── systemc For SystemC sources
|
│ ├── systemc For SystemC sources
|
│ └── verilog For verilog sources
|
│ └── verilog For verilog sources
|
│
|
│
|
├── doc Specification, design, verification and other PDF documents
|
├── doc Specification and other PDF documents
|
│ └── src Source version of all documents (Microsoft Word, Microsoft Visio)
|
│ └── src Source version of all documents (Microsoft Word, Microsoft Visio)
|
│
|
│
|
├── rtl Verilog RTL sources
|
├── rtl Verilog RTL sources
|
│
|
│
|
├── sim Top level simulations
|
├── sim Top level simulations
|
│ ├── matlab_sim MATLAB simulations
|
│ ├── matlab_sim MATLAB simulations
|
│ │ ├── out Useful output from MATLAB simulation
|
│ │ ├── out Useful output from MATLAB simulation
|
│ │ └── run MATLAB sources and for running MATLAB simulations
|
│ │ └── run MATLAB sources and for running MATLAB simulations
|
│ │
|
│ │
|
│ └── rtl_sim RTL simulations
|
│ └── rtl_sim RTL simulations
|
│ ├── out Useful output from RTL simulation
|
│ ├── out Useful output from RTL simulation
|
│ └── run For running RTL simulations
|
│ └── run For running RTL simulations
|
│
|
│
|
└── sw Software sources for Python script utilities
|
└── sw Software sources for Python script utilities
|
├── out Useful output from Python script utilities
|
├── out Useful output from Python script utilities
|
└── run Python sources and for running Python script utilities
|
└── run Python sources and for running Python script utilities
|
|
|
OPEN-SOURCE TOOLS:
|
OPEN-SOURCE TOOLS:
|
1. Ubuntu 18.04 LTS Linux OS development platform
|
1. Ubuntu 18.04 LTS Linux OS development platform
|
2. SystemC 2.3.2-Accellera SystemC test bench simulator
|
2. SystemC 2.3.2-Accellera SystemC test bench simulator
|
3. Verilator Verilog simulator
|
3. Verilator Verilog simulator
|
4. GTKWave Verilog simulation waveform viewer
|
4. GTKWave Verilog simulation waveform viewer
|
5. GNU Octave Octave syntax is largely compatible with MATLAB
|
5. GNU Octave Octave syntax is largely compatible with MATLAB
|
6. Python RTL-simulation vs. MATLAB-expected check script
|
6. Python RTL-simulation vs. MATLAB-expected check script
|
|
|
|
TO DO:
|
|
1. Create Magnitude Response test of lpffir_core.sv with expected behavior of specification document Appendix B.
|
|
2. Create Phase Response test of lpffir_core.sv with expected behavior of specification document Appendix B.
|
|
|
