/*
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/*
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* Copyright (c) 2016 by Alex I. Kuznetsov.
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* Copyright (c) 2016 by Alex I. Kuznetsov.
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*
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*
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* Part of the LXP32 CPU IP core.
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* Part of the LXP32 CPU IP core.
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*
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*
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* This module defines the Generator class which generates
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* This module defines the Generator class which generates
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* WISHBONE interconnect VHDL description based on provided
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* WISHBONE interconnect VHDL description based on provided
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* parameters.
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* parameters.
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*/
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*/
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#ifndef GENERATOR_H_INCLUDED
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#ifndef GENERATOR_H_INCLUDED
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#define GENERATOR_H_INCLUDED
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#define GENERATOR_H_INCLUDED
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#include "range.h"
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#include "range.h"
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#include <iostream>
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#include <iostream>
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#include <string>
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#include <string>
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class Generator {
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class Generator {
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int _masters;
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int _masters;
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int _slaves;
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int _slaves;
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int _addrWidth;
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int _addrWidth;
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int _slaveAddrWidth;
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int _slaveAddrWidth;
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int _portSize;
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int _portSize;
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int _portGranularity;
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int _portGranularity;
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std::string _entityName;
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std::string _entityName;
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bool _pipelinedArbiter;
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bool _pipelinedArbiter;
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bool _registeredFeedback;
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bool _registeredFeedback;
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bool _unsafeDecoder;
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bool _unsafeDecoder;
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Range _mastersRange;
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Range _mastersRange;
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Range _slavesRange;
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Range _slavesRange;
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Range _addrRange;
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Range _addrRange;
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Range _slaveAddrRange;
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Range _slaveAddrRange;
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Range _slaveDecoderRange;
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Range _slaveDecoderRange;
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Range _dataRange;
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Range _dataRange;
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Range _selRange;
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Range _selRange;
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bool _fallbackSlave;
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bool _fallbackSlave;
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public:
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public:
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Generator();
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Generator();
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void setMasters(int i);
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void setMasters(int i);
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void setSlaves(int i);
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void setSlaves(int i);
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void setAddrWidth(int i);
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void setAddrWidth(int i);
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void setSlaveAddrWidth(int i);
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void setSlaveAddrWidth(int i);
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void setPortSize(int i);
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void setPortSize(int i);
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void setPortGranularity(int i);
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void setPortGranularity(int i);
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void setEntityName(const std::string &str);
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void setEntityName(const std::string &str);
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void setPipelinedArbiter(bool b);
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void setPipelinedArbiter(bool b);
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void setRegisteredFeedback(bool b);
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void setRegisteredFeedback(bool b);
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void setUnsafeDecoder(bool b);
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void setUnsafeDecoder(bool b);
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int masters() const;
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int masters() const;
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int slaves() const;
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int slaves() const;
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int addrWidth() const;
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int addrWidth() const;
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int slaveAddrWidth() const;
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int slaveAddrWidth() const;
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int portSize() const;
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int portSize() const;
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int portGranularity() const;
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int portGranularity() const;
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std::string entityName() const;
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std::string entityName() const;
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bool pipelinedArbiter() const;
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bool pipelinedArbiter() const;
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bool registeredFeedback() const;
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bool registeredFeedback() const;
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bool unsafeDecoder() const;
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bool unsafeDecoder() const;
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void generate(const std::string &filename);
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void generate(const std::string &filename);
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private:
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private:
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void prepare();
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void prepare();
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void writeBanner(std::ostream &os);
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void writeBanner(std::ostream &os);
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void writePreamble(std::ostream &os);
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void writePreamble(std::ostream &os);
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void writeEntity(std::ostream &os);
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void writeEntity(std::ostream &os);
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void writeArchitecture(std::ostream &os);
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void writeArchitecture(std::ostream &os);
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void writeArbiter(std::ostream &os);
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void writeArbiter(std::ostream &os);
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void writeMasterMux(std::ostream &os);
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void writeMasterMux(std::ostream &os);
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void writeMasterDemux(std::ostream &os);
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void writeMasterDemux(std::ostream &os);
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void writeSlaveMux(std::ostream &os);
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void writeSlaveMux(std::ostream &os);
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void writeSlaveDemux(std::ostream &os);
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void writeSlaveDemux(std::ostream &os);
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static std::string binaryLiteral(int value,int n);
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static std::string binaryLiteral(int value,int n);
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static std::string decodedLiteral(int value,int n);
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static std::string decodedLiteral(int value,int n);
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};
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};
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#endif
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#endif
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