#ifndef _BOARD_H_
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#ifndef _BOARD_H_
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#define _BOARD_H_
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#define _BOARD_H_
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#define MC_ENABLED 0
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#define MC_ENABLED 0
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#define IC_ENABLE 0
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#define IC_ENABLE 0
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#define IC_SIZE 8192
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#define IC_SIZE 8192
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#define DC_ENABLE 0
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#define DC_ENABLE 0
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#define DC_SIZE 8192
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#define DC_SIZE 8192
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#define IN_CLK 25000000
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#define IN_CLK 25000000
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#define TICKS_PER_SEC 100
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#define TICKS_PER_SEC 100
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#define STACK_SIZE 0x01000
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#define STACK_SIZE 0x01000
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#define UART_BAUD_RATE 115200
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#define UART_BAUD_RATE 115200
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#define UART_BASE 0x90000000
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#define UART_BASE 0x90000000
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#define UART_IRQ 2
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#define UART_IRQ 2
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#define ETH_BASE 0x92000000
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#define ETH_BASE 0x92000000
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#define ETH_IRQ 4
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#define ETH_IRQ 4
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#define I2C_BASE 0x9D000000
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#define I2C_BASE 0x9D000000
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#define I2C_IRQ 3
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#define I2C_IRQ 3
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#define CAN_BASE 0x94000000
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#define CAN_BASE 0x94000000
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#define CAN_IRQ 5
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#define CAN_IRQ 5
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#define MC_BASE_ADDR 0x60000000
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#define MC_BASE_ADDR 0x60000000
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#define SPI_BASE 0xa0000000
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#define SPI_BASE 0xa0000000
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#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */
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#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */
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#define BOARD_DEF_IP 0x0a010185
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#define BOARD_DEF_IP 0x0a010185
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#define BOARD_DEF_MASK 0xff000000
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#define BOARD_DEF_MASK 0xff000000
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#define BOARD_DEF_GW 0x0a010101
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#define BOARD_DEF_GW 0x0a010101
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#define ETH_MACADDR0 0x00
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#define ETH_MACADDR0 0x00
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#define ETH_MACADDR1 0x12
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#define ETH_MACADDR1 0x12
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#define ETH_MACADDR2 0x34
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#define ETH_MACADDR2 0x34
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#define ETH_MACADDR3 0x56
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#define ETH_MACADDR3 0x56
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#define ETH_MACADDR4 0x78
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#define ETH_MACADDR4 0x78
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#define ETH_MACADDR5 0x9a
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#define ETH_MACADDR5 0x9a
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/* Whether online help is available -- saves space */
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/* Whether online help is available -- saves space */
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#define HELP_ENABLED 1
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#define HELP_ENABLED 1
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/* Whether self check is enabled */
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/* Whether self check is enabled */
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#define SELF_CHECK 1
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#define SELF_CHECK 1
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#endif
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#endif
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