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[/] [minsoc/] [trunk/] [prj/] [src/] [ethmac.prj] - Diff between revs 85 and 141
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| Rev 85 |
Rev 141 |
PROJECT_DIR=rtl/verilog/ethmac/rtl/verilog
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PROJECT_DIR=rtl/verilog/ethmac/rtl/verilog
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PROJECT_SRC=(eth_cop.v
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PROJECT_SRC=(eth_cop.v
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eth_registers.v
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eth_registers.v
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eth_rxethmac.v
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eth_rxethmac.v
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eth_miim.v
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eth_miim.v
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ethmac.v
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ethmac.v
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eth_rxaddrcheck.v
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eth_rxaddrcheck.v
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eth_outputcontrol.v
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eth_outputcontrol.v
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eth_rxstatem.v
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eth_rxstatem.v
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eth_txethmac.v
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eth_txethmac.v
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eth_wishbone.v
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eth_wishbone.v
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eth_maccontrol.v
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eth_maccontrol.v
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eth_txstatem.v
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eth_txstatem.v
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ethmac_defines.v
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ethmac_defines.v
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eth_spram_256x32.v
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eth_spram_256x32.v
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eth_shiftreg.v
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eth_shiftreg.v
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eth_clockgen.v
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eth_clockgen.v
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eth_crc.v
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eth_crc.v
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eth_rxcounters.v
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eth_rxcounters.v
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eth_macstatus.v
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eth_macstatus.v
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eth_random.v
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eth_random.v
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eth_register.v
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eth_register.v
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eth_fifo.v
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eth_fifo.v
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eth_receivecontrol.v
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eth_receivecontrol.v
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eth_transmitcontrol.v
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eth_transmitcontrol.v
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eth_txcounters.v)
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eth_txcounters.v
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xilinx_dist_ram_16x32.v)
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