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[/] [minsoc/] [trunk/] [sw/] [support/] [reset.S] - Diff between revs 74 and 80
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Rev 80 |
/* Support file for c based tests */
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/* Support file for c based tests */
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#include "or1200.h"
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#include "or1200.h"
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#include "../../backend/board.h"
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#include
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.section .stack
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.section .stack
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.space STACK_SIZE
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.space STACK_SIZE
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_stack:
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_stack:
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.section .reset, "ax"
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.section .reset, "ax"
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.org 0x100
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.org 0x100
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_reset_vector:
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_reset_vector:
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l.nop
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l.nop
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l.nop
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l.nop
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l.addi r2,r0,0x0
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l.addi r2,r0,0x0
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l.addi r3,r0,0x0
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l.addi r3,r0,0x0
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l.addi r4,r0,0x0
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l.addi r4,r0,0x0
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l.addi r5,r0,0x0
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l.addi r5,r0,0x0
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l.addi r6,r0,0x0
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l.addi r6,r0,0x0
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l.addi r7,r0,0x0
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l.addi r7,r0,0x0
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l.addi r8,r0,0x0
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l.addi r8,r0,0x0
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l.addi r9,r0,0x0
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l.addi r9,r0,0x0
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l.addi r10,r0,0x0
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l.addi r10,r0,0x0
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l.addi r11,r0,0x0
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l.addi r11,r0,0x0
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l.addi r12,r0,0x0
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l.addi r12,r0,0x0
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l.addi r13,r0,0x0
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l.addi r13,r0,0x0
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l.addi r14,r0,0x0
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l.addi r14,r0,0x0
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l.addi r15,r0,0x0
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l.addi r15,r0,0x0
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l.addi r16,r0,0x0
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l.addi r16,r0,0x0
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l.addi r17,r0,0x0
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l.addi r17,r0,0x0
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l.addi r18,r0,0x0
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l.addi r18,r0,0x0
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l.addi r19,r0,0x0
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l.addi r19,r0,0x0
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l.addi r20,r0,0x0
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l.addi r20,r0,0x0
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l.addi r21,r0,0x0
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l.addi r21,r0,0x0
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l.addi r22,r0,0x0
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l.addi r22,r0,0x0
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l.addi r23,r0,0x0
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l.addi r23,r0,0x0
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l.addi r24,r0,0x0
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l.addi r24,r0,0x0
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l.addi r25,r0,0x0
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l.addi r25,r0,0x0
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l.addi r26,r0,0x0
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l.addi r26,r0,0x0
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l.addi r27,r0,0x0
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l.addi r27,r0,0x0
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l.addi r28,r0,0x0
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l.addi r28,r0,0x0
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l.addi r29,r0,0x0
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l.addi r29,r0,0x0
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l.addi r30,r0,0x0
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l.addi r30,r0,0x0
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l.addi r31,r0,0x0
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l.addi r31,r0,0x0
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/*
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/*
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l.movhi r3,hi(MC_BASE_ADDR)
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l.movhi r3,hi(MC_BASE_ADDR)
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l.ori r3,r3,MC_BA_MASK
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l.ori r3,r3,MC_BA_MASK
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l.addi r5,r0,0x00
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l.addi r5,r0,0x00
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l.sw 0(r3),r5
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l.sw 0(r3),r5
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*/
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*/
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l.movhi r3,hi(_start)
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l.movhi r3,hi(_start)
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l.ori r3,r3,lo(_start)
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l.ori r3,r3,lo(_start)
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l.jr r3
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l.jr r3
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l.nop
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l.nop
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.section .text
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.section .text
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_start:
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_start:
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.if IC | DC
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.if IC | DC
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/* Flush IC and/or DC */
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/* Flush IC and/or DC */
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l.addi r10,r0,0
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l.addi r10,r0,0
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l.addi r11,r0,0
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l.addi r11,r0,0
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l.addi r12,r0,0
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l.addi r12,r0,0
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.if IC
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.if IC
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l.addi r11,r0,IC_SIZE
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l.addi r11,r0,IC_SIZE
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.endif
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.endif
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.if DC
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.if DC
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l.addi r12,r0,DC_SIZE
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l.addi r12,r0,DC_SIZE
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.endif
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.endif
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l.sfleu r12,r11
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l.sfleu r12,r11
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l.bf loop
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l.bf loop
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l.nop
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l.nop
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l.add r11,r0,r12
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l.add r11,r0,r12
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loop:
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loop:
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.if IC
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.if IC
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l.mtspr r0,r10,SPR_ICBIR
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l.mtspr r0,r10,SPR_ICBIR
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.endif
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.endif
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.if DC
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.if DC
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l.mtspr r0,r10,SPR_DCBIR
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l.mtspr r0,r10,SPR_DCBIR
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.endif
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.endif
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l.sfne r10,r11
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l.sfne r10,r11
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l.bf loop
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l.bf loop
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l.addi r10,r10,16
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l.addi r10,r10,16
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/* Enable IC and/or DC */
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/* Enable IC and/or DC */
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l.addi r10,r0,(SPR_SR_SM)
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l.addi r10,r0,(SPR_SR_SM)
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.if IC
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.if IC
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l.ori r10,r10,(SPR_SR_ICE)
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l.ori r10,r10,(SPR_SR_ICE)
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.endif
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.endif
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.if DC
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.if DC
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l.ori r10,r10,(SPR_SR_DCE)
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l.ori r10,r10,(SPR_SR_DCE)
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.endif
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.endif
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l.mtspr r0,r10,SPR_SR
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l.mtspr r0,r10,SPR_SR
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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l.nop
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.endif
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.endif
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/* Set stack pointer */
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/* Set stack pointer */
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l.movhi r1,hi(_stack)
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l.movhi r1,hi(_stack)
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l.ori r1,r1,lo(_stack)
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l.ori r1,r1,lo(_stack)
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/* Jump to main */
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/* Jump to main */
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l.movhi r2,hi(CLABEL(reset))
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l.movhi r2,hi(CLABEL(reset))
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l.ori r2,r2,lo(CLABEL(reset))
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l.ori r2,r2,lo(CLABEL(reset))
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l.jr r2
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l.jr r2
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l.nop
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l.nop
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