(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
|
(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
|
(status (written (timeStamp 2008 1 31 19 30 47)
|
(status (written (timeStamp 2008 1 31 19 30 47)
|
(author "Xilinx, Inc.")
|
(author "Xilinx, Inc.")
|
(program "Xilinx CORE Generator" (version "Xilinx CORE Generator 8.2.03i"))))
|
(program "Xilinx CORE Generator" (version "Xilinx CORE Generator 8.2.03i"))))
|
(comment "
|
(comment "
|
This file is owned and controlled by Xilinx and must be used
|
This file is owned and controlled by Xilinx and must be used
|
solely for design, simulation, implementation and creation of
|
solely for design, simulation, implementation and creation of
|
design files limited to Xilinx devices or technologies. Use
|
design files limited to Xilinx devices or technologies. Use
|
with non-Xilinx devices or technologies is expressly prohibited
|
with non-Xilinx devices or technologies is expressly prohibited
|
and immediately terminates your license.
|
and immediately terminates your license.
|
|
|
XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'
|
XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'
|
SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
|
SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
|
XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
|
XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
|
AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
|
AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
|
OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
|
OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
|
IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
|
IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
|
AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
|
AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
|
FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
|
FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
|
WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
|
WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
|
IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
|
IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
|
REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
|
REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
|
INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
FOR A PARTICULAR PURPOSE.
|
FOR A PARTICULAR PURPOSE.
|
|
|
Xilinx products are not intended for use in life support
|
Xilinx products are not intended for use in life support
|
appliances, devices, or systems. Use in such applications are
|
appliances, devices, or systems. Use in such applications are
|
expressly prohibited.
|
expressly prohibited.
|
|
|
(c) Copyright 1995-2006 Xilinx, Inc.
|
(c) Copyright 1995-2006 Xilinx, Inc.
|
All rights reserved.
|
All rights reserved.
|
|
|
")
|
")
|
(comment "Core parameters: ")
|
(comment "Core parameters: ")
|
(comment "c_wr_response_latency = 1 ")
|
(comment "c_wr_response_latency = 1 ")
|
(comment "c_has_rd_data_count = 0 ")
|
(comment "c_has_rd_data_count = 0 ")
|
(comment "c_din_width = 12 ")
|
(comment "c_din_width = 12 ")
|
(comment "c_has_wr_data_count = 0 ")
|
(comment "c_has_wr_data_count = 0 ")
|
(comment "InstanceName = jpeg_checkff_fifo ")
|
(comment "InstanceName = jpeg_checkff_fifo ")
|
(comment "c_implementation_type = 2 ")
|
(comment "c_implementation_type = 2 ")
|
(comment "c_family = virtex2p ")
|
(comment "c_family = virtex2p ")
|
(comment "c_has_wr_rst = 0 ")
|
(comment "c_has_wr_rst = 0 ")
|
(comment "c_underflow_low = 0 ")
|
(comment "c_underflow_low = 0 ")
|
(comment "c_has_meminit_file = 0 ")
|
(comment "c_has_meminit_file = 0 ")
|
(comment "c_has_overflow = 0 ")
|
(comment "c_has_overflow = 0 ")
|
(comment "c_preload_latency = 0 ")
|
(comment "c_preload_latency = 0 ")
|
(comment "c_dout_width = 12 ")
|
(comment "c_dout_width = 12 ")
|
(comment "c_rd_depth = 2048 ")
|
(comment "c_rd_depth = 2048 ")
|
(comment "c_default_value = BlankString ")
|
(comment "c_default_value = BlankString ")
|
(comment "c_mif_file_name = BlankString ")
|
(comment "c_mif_file_name = BlankString ")
|
(comment "c_has_underflow = 0 ")
|
(comment "c_has_underflow = 0 ")
|
(comment "c_has_rd_rst = 0 ")
|
(comment "c_has_rd_rst = 0 ")
|
(comment "c_has_almost_full = 1 ")
|
(comment "c_has_almost_full = 1 ")
|
(comment "c_has_rst = 1 ")
|
(comment "c_has_rst = 1 ")
|
(comment "c_data_count_width = 2 ")
|
(comment "c_data_count_width = 2 ")
|
(comment "c_has_wr_ack = 0 ")
|
(comment "c_has_wr_ack = 0 ")
|
(comment "c_wr_ack_low = 0 ")
|
(comment "c_wr_ack_low = 0 ")
|
(comment "c_common_clock = 0 ")
|
(comment "c_common_clock = 0 ")
|
(comment "c_rd_pntr_width = 11 ")
|
(comment "c_rd_pntr_width = 11 ")
|
(comment "c_has_almost_empty = 1 ")
|
(comment "c_has_almost_empty = 1 ")
|
(comment "c_rd_data_count_width = 2 ")
|
(comment "c_rd_data_count_width = 2 ")
|
(comment "c_enable_rlocs = 0 ")
|
(comment "c_enable_rlocs = 0 ")
|
(comment "c_wr_pntr_width = 11 ")
|
(comment "c_wr_pntr_width = 11 ")
|
(comment "c_overflow_low = 0 ")
|
(comment "c_overflow_low = 0 ")
|
(comment "c_prog_empty_type = 0 ")
|
(comment "c_prog_empty_type = 0 ")
|
(comment "c_optimization_mode = 0 ")
|
(comment "c_optimization_mode = 0 ")
|
(comment "c_wr_data_count_width = 2 ")
|
(comment "c_wr_data_count_width = 2 ")
|
(comment "c_preload_regs = 1 ")
|
(comment "c_preload_regs = 1 ")
|
(comment "c_dout_rst_val = 0 ")
|
(comment "c_dout_rst_val = 0 ")
|
(comment "c_has_data_count = 0 ")
|
(comment "c_has_data_count = 0 ")
|
(comment "c_prog_full_thresh_negate_val = 2046 ")
|
(comment "c_prog_full_thresh_negate_val = 2046 ")
|
(comment "c_wr_depth = 2048 ")
|
(comment "c_wr_depth = 2048 ")
|
(comment "c_prog_empty_thresh_negate_val = 2046 ")
|
(comment "c_prog_empty_thresh_negate_val = 2046 ")
|
(comment "c_prog_empty_thresh_assert_val = 2046 ")
|
(comment "c_prog_empty_thresh_assert_val = 2046 ")
|
(comment "c_has_valid = 1 ")
|
(comment "c_has_valid = 1 ")
|
(comment "c_init_wr_pntr_val = 0 ")
|
(comment "c_init_wr_pntr_val = 0 ")
|
(comment "c_prog_full_thresh_assert_val = 2046 ")
|
(comment "c_prog_full_thresh_assert_val = 2046 ")
|
(comment "c_use_fifo16_flags = 0 ")
|
(comment "c_use_fifo16_flags = 0 ")
|
(comment "c_has_backup = 0 ")
|
(comment "c_has_backup = 0 ")
|
(comment "c_valid_low = 0 ")
|
(comment "c_valid_low = 0 ")
|
(comment "c_prim_fifo_type = 1024 ")
|
(comment "c_prim_fifo_type = 1024 ")
|
(comment "c_count_type = 0 ")
|
(comment "c_count_type = 0 ")
|
(comment "c_prog_full_type = 0 ")
|
(comment "c_prog_full_type = 0 ")
|
(comment "c_memory_type = 1 ")
|
(comment "c_memory_type = 1 ")
|
(external xilinxun (edifLevel 0)
|
(external xilinxun (edifLevel 0)
|
(technology (numberDefinition))
|
(technology (numberDefinition))
|
(cell VCC (cellType GENERIC)
|
(cell VCC (cellType GENERIC)
|
(view view_1 (viewType NETLIST)
|
(view view_1 (viewType NETLIST)
|
(interface
|
(interface
|
(port P (direction OUTPUT))
|
(port P (direction OUTPUT))
|
)
|
)
|
)
|
)
|
)
|
)
|
(cell GND (cellType GENERIC)
|
(cell GND (cellType GENERIC)
|
(view view_1 (viewType NETLIST)
|
(view view_1 (viewType NETLIST)
|
(interface
|
(interface
|
(port G (direction OUTPUT))
|
(port G (direction OUTPUT))
|
)
|
)
|
)
|
)
|
)
|
)
|
)
|
)
|
(external jpeg_checkff_fifo_fifo_generator_v2_3_xst_1_lib (edifLevel 0)
|
(external jpeg_checkff_fifo_fifo_generator_v2_3_xst_1_lib (edifLevel 0)
|
(technology (numberDefinition))
|
(technology (numberDefinition))
|
(cell jpeg_checkff_fifo_fifo_generator_v2_3_xst_1 (cellType GENERIC)
|
(cell jpeg_checkff_fifo_fifo_generator_v2_3_xst_1 (cellType GENERIC)
|
(view view_1 (viewType NETLIST)
|
(view view_1 (viewType NETLIST)
|
(interface
|
(interface
|
(port clk (direction INPUT))
|
(port clk (direction INPUT))
|
(port backup (direction INPUT))
|
(port backup (direction INPUT))
|
(port backup_marker (direction INPUT))
|
(port backup_marker (direction INPUT))
|
(port ( array ( rename din "din<11:0>") 12 ) (direction INPUT))
|
(port ( array ( rename din "din<11:0>") 12 ) (direction INPUT))
|
(port ( array ( rename prog_empty_thresh "prog_empty_thresh<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_empty_thresh "prog_empty_thresh<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_empty_thresh_assert "prog_empty_thresh_assert<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_empty_thresh_assert "prog_empty_thresh_assert<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_empty_thresh_negate "prog_empty_thresh_negate<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_empty_thresh_negate "prog_empty_thresh_negate<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_full_thresh "prog_full_thresh<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_full_thresh "prog_full_thresh<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_full_thresh_assert "prog_full_thresh_assert<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_full_thresh_assert "prog_full_thresh_assert<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_full_thresh_negate "prog_full_thresh_negate<10:0>") 11 ) (direction INPUT))
|
(port ( array ( rename prog_full_thresh_negate "prog_full_thresh_negate<10:0>") 11 ) (direction INPUT))
|
(port rd_clk (direction INPUT))
|
(port rd_clk (direction INPUT))
|
(port rd_en (direction INPUT))
|
(port rd_en (direction INPUT))
|
(port rd_rst (direction INPUT))
|
(port rd_rst (direction INPUT))
|
(port rst (direction INPUT))
|
(port rst (direction INPUT))
|
(port wr_clk (direction INPUT))
|
(port wr_clk (direction INPUT))
|
(port wr_en (direction INPUT))
|
(port wr_en (direction INPUT))
|
(port wr_rst (direction INPUT))
|
(port wr_rst (direction INPUT))
|
(port almost_empty (direction OUTPUT))
|
(port almost_empty (direction OUTPUT))
|
(port almost_full (direction OUTPUT))
|
(port almost_full (direction OUTPUT))
|
(port ( array ( rename data_count "data_count<1:0>") 2 ) (direction OUTPUT))
|
(port ( array ( rename data_count "data_count<1:0>") 2 ) (direction OUTPUT))
|
(port ( array ( rename dout "dout<11:0>") 12 ) (direction OUTPUT))
|
(port ( array ( rename dout "dout<11:0>") 12 ) (direction OUTPUT))
|
(port empty (direction OUTPUT))
|
(port empty (direction OUTPUT))
|
(port full (direction OUTPUT))
|
(port full (direction OUTPUT))
|
(port overflow (direction OUTPUT))
|
(port overflow (direction OUTPUT))
|
(port prog_empty (direction OUTPUT))
|
(port prog_empty (direction OUTPUT))
|
(port prog_full (direction OUTPUT))
|
(port prog_full (direction OUTPUT))
|
(port valid (direction OUTPUT))
|
(port valid (direction OUTPUT))
|
(port ( array ( rename rd_data_count "rd_data_count<1:0>") 2 ) (direction OUTPUT))
|
(port ( array ( rename rd_data_count "rd_data_count<1:0>") 2 ) (direction OUTPUT))
|
(port underflow (direction OUTPUT))
|
(port underflow (direction OUTPUT))
|
(port wr_ack (direction OUTPUT))
|
(port wr_ack (direction OUTPUT))
|
(port ( array ( rename wr_data_count "wr_data_count<1:0>") 2 ) (direction OUTPUT))
|
(port ( array ( rename wr_data_count "wr_data_count<1:0>") 2 ) (direction OUTPUT))
|
)
|
)
|
)
|
)
|
)
|
)
|
)
|
)
|
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
|
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
|
(cell jpeg_checkff_fifo
|
(cell jpeg_checkff_fifo
|
(cellType GENERIC) (view view_1 (viewType NETLIST)
|
(cellType GENERIC) (view view_1 (viewType NETLIST)
|
(interface
|
(interface
|
(port ( array ( rename din "din<11:0>") 12 ) (direction INPUT))
|
(port ( array ( rename din "din<11:0>") 12 ) (direction INPUT))
|
(port ( rename rd_clk "rd_clk") (direction INPUT))
|
(port ( rename rd_clk "rd_clk") (direction INPUT))
|
(port ( rename rd_en "rd_en") (direction INPUT))
|
(port ( rename rd_en "rd_en") (direction INPUT))
|
(port ( rename rst "rst") (direction INPUT))
|
(port ( rename rst "rst") (direction INPUT))
|
(port ( rename wr_clk "wr_clk") (direction INPUT))
|
(port ( rename wr_clk "wr_clk") (direction INPUT))
|
(port ( rename wr_en "wr_en") (direction INPUT))
|
(port ( rename wr_en "wr_en") (direction INPUT))
|
(port ( rename almost_empty "almost_empty") (direction OUTPUT))
|
(port ( rename almost_empty "almost_empty") (direction OUTPUT))
|
(port ( rename almost_full "almost_full") (direction OUTPUT))
|
(port ( rename almost_full "almost_full") (direction OUTPUT))
|
(port ( array ( rename dout "dout<11:0>") 12 ) (direction OUTPUT))
|
(port ( array ( rename dout "dout<11:0>") 12 ) (direction OUTPUT))
|
(port ( rename empty "empty") (direction OUTPUT))
|
(port ( rename empty "empty") (direction OUTPUT))
|
(port ( rename full "full") (direction OUTPUT))
|
(port ( rename full "full") (direction OUTPUT))
|
(port ( rename valid "valid") (direction OUTPUT))
|
(port ( rename valid "valid") (direction OUTPUT))
|
)
|
)
|
(contents
|
(contents
|
(instance VCC (viewRef view_1 (cellRef VCC (libraryRef xilinxun))))
|
(instance VCC (viewRef view_1 (cellRef VCC (libraryRef xilinxun))))
|
(instance GND (viewRef view_1 (cellRef GND (libraryRef xilinxun))))
|
(instance GND (viewRef view_1 (cellRef GND (libraryRef xilinxun))))
|
(instance BU2
|
(instance BU2
|
(viewRef view_1 (cellRef jpeg_checkff_fifo_fifo_generator_v2_3_xst_1 (libraryRef jpeg_checkff_fifo_fifo_generator_v2_3_xst_1_lib)))
|
(viewRef view_1 (cellRef jpeg_checkff_fifo_fifo_generator_v2_3_xst_1 (libraryRef jpeg_checkff_fifo_fifo_generator_v2_3_xst_1_lib)))
|
)
|
)
|
(net (rename N5 "din<11>")
|
(net (rename N5 "din<11>")
|
(joined
|
(joined
|
(portRef (member din 0))
|
(portRef (member din 0))
|
(portRef (member din 0) (instanceRef BU2))
|
(portRef (member din 0) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N6 "din<10>")
|
(net (rename N6 "din<10>")
|
(joined
|
(joined
|
(portRef (member din 1))
|
(portRef (member din 1))
|
(portRef (member din 1) (instanceRef BU2))
|
(portRef (member din 1) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N7 "din<9>")
|
(net (rename N7 "din<9>")
|
(joined
|
(joined
|
(portRef (member din 2))
|
(portRef (member din 2))
|
(portRef (member din 2) (instanceRef BU2))
|
(portRef (member din 2) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N8 "din<8>")
|
(net (rename N8 "din<8>")
|
(joined
|
(joined
|
(portRef (member din 3))
|
(portRef (member din 3))
|
(portRef (member din 3) (instanceRef BU2))
|
(portRef (member din 3) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N9 "din<7>")
|
(net (rename N9 "din<7>")
|
(joined
|
(joined
|
(portRef (member din 4))
|
(portRef (member din 4))
|
(portRef (member din 4) (instanceRef BU2))
|
(portRef (member din 4) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N10 "din<6>")
|
(net (rename N10 "din<6>")
|
(joined
|
(joined
|
(portRef (member din 5))
|
(portRef (member din 5))
|
(portRef (member din 5) (instanceRef BU2))
|
(portRef (member din 5) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N11 "din<5>")
|
(net (rename N11 "din<5>")
|
(joined
|
(joined
|
(portRef (member din 6))
|
(portRef (member din 6))
|
(portRef (member din 6) (instanceRef BU2))
|
(portRef (member din 6) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N12 "din<4>")
|
(net (rename N12 "din<4>")
|
(joined
|
(joined
|
(portRef (member din 7))
|
(portRef (member din 7))
|
(portRef (member din 7) (instanceRef BU2))
|
(portRef (member din 7) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N13 "din<3>")
|
(net (rename N13 "din<3>")
|
(joined
|
(joined
|
(portRef (member din 8))
|
(portRef (member din 8))
|
(portRef (member din 8) (instanceRef BU2))
|
(portRef (member din 8) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N14 "din<2>")
|
(net (rename N14 "din<2>")
|
(joined
|
(joined
|
(portRef (member din 9))
|
(portRef (member din 9))
|
(portRef (member din 9) (instanceRef BU2))
|
(portRef (member din 9) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N15 "din<1>")
|
(net (rename N15 "din<1>")
|
(joined
|
(joined
|
(portRef (member din 10))
|
(portRef (member din 10))
|
(portRef (member din 10) (instanceRef BU2))
|
(portRef (member din 10) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N16 "din<0>")
|
(net (rename N16 "din<0>")
|
(joined
|
(joined
|
(portRef (member din 11))
|
(portRef (member din 11))
|
(portRef (member din 11) (instanceRef BU2))
|
(portRef (member din 11) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N83 "rd_clk")
|
(net (rename N83 "rd_clk")
|
(joined
|
(joined
|
(portRef rd_clk)
|
(portRef rd_clk)
|
(portRef rd_clk (instanceRef BU2))
|
(portRef rd_clk (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N84 "rd_en")
|
(net (rename N84 "rd_en")
|
(joined
|
(joined
|
(portRef rd_en)
|
(portRef rd_en)
|
(portRef rd_en (instanceRef BU2))
|
(portRef rd_en (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N86 "rst")
|
(net (rename N86 "rst")
|
(joined
|
(joined
|
(portRef rst)
|
(portRef rst)
|
(portRef rst (instanceRef BU2))
|
(portRef rst (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N87 "wr_clk")
|
(net (rename N87 "wr_clk")
|
(joined
|
(joined
|
(portRef wr_clk)
|
(portRef wr_clk)
|
(portRef wr_clk (instanceRef BU2))
|
(portRef wr_clk (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N88 "wr_en")
|
(net (rename N88 "wr_en")
|
(joined
|
(joined
|
(portRef wr_en)
|
(portRef wr_en)
|
(portRef wr_en (instanceRef BU2))
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(portRef wr_en (instanceRef BU2))
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)
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)
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)
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)
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(net (rename N90 "almost_empty")
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(net (rename N90 "almost_empty")
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(joined
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(joined
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(portRef almost_empty)
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(portRef almost_empty)
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(portRef almost_empty (instanceRef BU2))
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(portRef almost_empty (instanceRef BU2))
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)
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)
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)
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)
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(net (rename N91 "almost_full")
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(net (rename N91 "almost_full")
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(joined
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(joined
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(portRef almost_full)
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(portRef almost_full)
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(portRef almost_full (instanceRef BU2))
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(portRef almost_full (instanceRef BU2))
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)
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)
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)
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)
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(net (rename N94 "dout<11>")
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(net (rename N94 "dout<11>")
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(joined
|
(joined
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(portRef (member dout 0))
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(portRef (member dout 0))
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(portRef (member dout 0) (instanceRef BU2))
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(portRef (member dout 0) (instanceRef BU2))
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)
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)
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)
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)
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(net (rename N95 "dout<10>")
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(net (rename N95 "dout<10>")
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(joined
|
(joined
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(portRef (member dout 1))
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(portRef (member dout 1))
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(portRef (member dout 1) (instanceRef BU2))
|
(portRef (member dout 1) (instanceRef BU2))
|
)
|
)
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)
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)
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(net (rename N96 "dout<9>")
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(net (rename N96 "dout<9>")
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(joined
|
(joined
|
(portRef (member dout 2))
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(portRef (member dout 2))
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(portRef (member dout 2) (instanceRef BU2))
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(portRef (member dout 2) (instanceRef BU2))
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)
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)
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)
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)
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(net (rename N97 "dout<8>")
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(net (rename N97 "dout<8>")
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(joined
|
(joined
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(portRef (member dout 3))
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(portRef (member dout 3))
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(portRef (member dout 3) (instanceRef BU2))
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(portRef (member dout 3) (instanceRef BU2))
|
)
|
)
|
)
|
)
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(net (rename N98 "dout<7>")
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(net (rename N98 "dout<7>")
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(joined
|
(joined
|
(portRef (member dout 4))
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(portRef (member dout 4))
|
(portRef (member dout 4) (instanceRef BU2))
|
(portRef (member dout 4) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N99 "dout<6>")
|
(net (rename N99 "dout<6>")
|
(joined
|
(joined
|
(portRef (member dout 5))
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(portRef (member dout 5))
|
(portRef (member dout 5) (instanceRef BU2))
|
(portRef (member dout 5) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N100 "dout<5>")
|
(net (rename N100 "dout<5>")
|
(joined
|
(joined
|
(portRef (member dout 6))
|
(portRef (member dout 6))
|
(portRef (member dout 6) (instanceRef BU2))
|
(portRef (member dout 6) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N101 "dout<4>")
|
(net (rename N101 "dout<4>")
|
(joined
|
(joined
|
(portRef (member dout 7))
|
(portRef (member dout 7))
|
(portRef (member dout 7) (instanceRef BU2))
|
(portRef (member dout 7) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N102 "dout<3>")
|
(net (rename N102 "dout<3>")
|
(joined
|
(joined
|
(portRef (member dout 8))
|
(portRef (member dout 8))
|
(portRef (member dout 8) (instanceRef BU2))
|
(portRef (member dout 8) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N103 "dout<2>")
|
(net (rename N103 "dout<2>")
|
(joined
|
(joined
|
(portRef (member dout 9))
|
(portRef (member dout 9))
|
(portRef (member dout 9) (instanceRef BU2))
|
(portRef (member dout 9) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N104 "dout<1>")
|
(net (rename N104 "dout<1>")
|
(joined
|
(joined
|
(portRef (member dout 10))
|
(portRef (member dout 10))
|
(portRef (member dout 10) (instanceRef BU2))
|
(portRef (member dout 10) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N105 "dout<0>")
|
(net (rename N105 "dout<0>")
|
(joined
|
(joined
|
(portRef (member dout 11))
|
(portRef (member dout 11))
|
(portRef (member dout 11) (instanceRef BU2))
|
(portRef (member dout 11) (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N106 "empty")
|
(net (rename N106 "empty")
|
(joined
|
(joined
|
(portRef empty)
|
(portRef empty)
|
(portRef empty (instanceRef BU2))
|
(portRef empty (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N107 "full")
|
(net (rename N107 "full")
|
(joined
|
(joined
|
(portRef full)
|
(portRef full)
|
(portRef full (instanceRef BU2))
|
(portRef full (instanceRef BU2))
|
)
|
)
|
)
|
)
|
(net (rename N111 "valid")
|
(net (rename N111 "valid")
|
(joined
|
(joined
|
(portRef valid)
|
(portRef valid)
|
(portRef valid (instanceRef BU2))
|
(portRef valid (instanceRef BU2))
|
)
|
)
|
)
|
)
|
))))
|
))))
|
(design jpeg_checkff_fifo (cellRef jpeg_checkff_fifo (libraryRef test_lib))
|
(design jpeg_checkff_fifo (cellRef jpeg_checkff_fifo (libraryRef test_lib))
|
(property X_CORE_INFO (string "fifo_generator_v2_3, Coregen 8.2.03i"))
|
(property X_CORE_INFO (string "fifo_generator_v2_3, Coregen 8.2.03i"))
|
(property PART (string "xc2vp30-ff896-7") (owner "Xilinx")))
|
(property PART (string "xc2vp30-ff896-7") (owner "Xilinx")))
|
)
|
)
|
|
|
